
Dung Anh Le
Examiner (ID: 12955, Phone: (571)272-1784 , Office: P/2819 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818, 2819 |
| Total Applications | 2716 |
| Issued Applications | 2558 |
| Pending Applications | 17 |
| Abandoned Applications | 155 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8858465
[patent_doc_number] => 08461000
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-06-11
[patent_title] => 'Method of making ultrahigh density vertical NAND memory device'
[patent_app_type] => utility
[patent_app_number] => 13/693337
[patent_app_country] => US
[patent_app_date] => 2012-12-04
[patent_effective_date] => 0000-00-00
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Array
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[patent_issue_date] => 2013-04-18
[patent_title] => 'METHODS FOR MANUFACTURING THIN FILM TRANSISTOR AND DISPLAY DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/692310 | Methods for manufacturing thin film transistor and display device | Dec 2, 2012 | Issued |
Array
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[id] => 8995648
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[patent_issue_date] => 2013-08-27
[patent_title] => 'Semiconductor device including bump formed on substrate to prevent extremely-low dielectric constant (ELK) interlayer dielectric layer (ILD) delamination during reflow process'
[patent_app_type] => utility
[patent_app_number] => 13/691427
[patent_app_country] => US
[patent_app_date] => 2012-11-30
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Array
(
[id] => 8731730
[patent_doc_number] => 20130077299
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[patent_kind] => A1
[patent_issue_date] => 2013-03-28
[patent_title] => 'HIGH VOLTAGE ARRAY LIGHT EMITTING DIODE (LED) DEVICES, FIXTURES AND METHODS'
[patent_app_type] => utility
[patent_app_number] => 13/671089
[patent_app_country] => US
[patent_app_date] => 2012-11-07
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/671089 | High voltage array light emitting diode (LED) devices and fixtures | Nov 6, 2012 | Issued |
Array
(
[id] => 8995515
[patent_doc_number] => 08519400
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[patent_issue_date] => 2013-08-27
[patent_title] => 'Light pipe etch control for CMOS fabrication'
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[patent_app_number] => 13/662562
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/662562 | Light pipe etch control for CMOS fabrication | Oct 28, 2012 | Issued |
Array
(
[id] => 8668942
[patent_doc_number] => 20130043480
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[patent_issue_date] => 2013-02-21
[patent_title] => 'Exposure Device, Exposure Method and Method of Manufacturing Semiconductor Device'
[patent_app_type] => utility
[patent_app_number] => 13/659205
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[patent_app_date] => 2012-10-24
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Array
(
[id] => 9575098
[patent_doc_number] => 08765510
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[patent_issue_date] => 2014-07-01
[patent_title] => 'Semiconductor diodes fabricated by aspect ratio trapping with coalesced films'
[patent_app_type] => utility
[patent_app_number] => 13/650206
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/650206 | Semiconductor diodes fabricated by aspect ratio trapping with coalesced films | Oct 11, 2012 | Issued |
Array
(
[id] => 9316427
[patent_doc_number] => 20140048765
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-20
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/812500
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/812500 | Method for manufacturing semiconductor device | Oct 11, 2012 | Issued |
Array
(
[id] => 8982542
[patent_doc_number] => 08513660
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[patent_kind] => B2
[patent_issue_date] => 2013-08-20
[patent_title] => 'Organic optoelectronic device and making method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/647232
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/647232 | Organic optoelectronic device and making method thereof | Oct 7, 2012 | Issued |
Array
(
[id] => 9406276
[patent_doc_number] => 20140097528
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-10
[patent_title] => 'CHIP ARRANGEMENTS, A CHIP PACKAGE AND A METHOD FOR MANUFACTURING A CHIP ARRANGEMENT'
[patent_app_type] => utility
[patent_app_number] => 13/645548
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/645548 | Chip arrangements, a chip package and a method for manufacturing a chip arrangement | Oct 4, 2012 | Issued |
Array
(
[id] => 9406231
[patent_doc_number] => 20140097483
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-10
[patent_title] => '3-D SINGLE FLOATING GATE NON-VOLATILE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/644880
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/644880 | 3-D single floating gate non-volatile memory device | Oct 3, 2012 | Issued |
Array
(
[id] => 8764994
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[patent_title] => 'SYSTEMS AND METHODS FOR AIR-RELEASE IN CAVITY PACKAGES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/645094 | Air-release features in cavity packages | Oct 3, 2012 | Issued |
Array
(
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[patent_title] => 'DYNAMIC MEMORY STRUCTURE'
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Array
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[id] => 9944772
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[patent_title] => 'Hydrogen mitigation schemes in the passivation of advanced devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/644506 | Hydrogen mitigation schemes in the passivation of advanced devices | Oct 3, 2012 | Issued |
Array
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[patent_title] => 'MONOLITHIC 3-D INTEGRATION USING GRAPHENE'
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Array
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Array
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Array
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Array
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