Search

Dung H. Bui

Examiner (ID: 7927, Phone: (571)270-7077 , Office: P/1773 )

Most Active Art Unit
1773
Art Unit(s)
4153, 1773, 1797, 1775, 1776, 1772
Total Applications
1707
Issued Applications
1289
Pending Applications
185
Abandoned Applications
275

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6224745 [patent_doc_number] => 20020004309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-10 [patent_title] => 'PROCESSES USED IN AN INDUCTIVELY COUPLED PLASMA REACTOR' [patent_app_type] => new [patent_app_number] => 09/328914 [patent_app_country] => US [patent_app_date] => 1999-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14083 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20020004309.pdf [firstpage_image] =>[orig_patent_app_number] => 09328914 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/328914
PROCESSES USED IN AN INDUCTIVELY COUPLED PLASMA REACTOR Jun 8, 1999 Abandoned
Array ( [id] => 4404594 [patent_doc_number] => 06271078 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Simplifying conductive plate/via isolation' [patent_app_type] => 1 [patent_app_number] => 9/324949 [patent_app_country] => US [patent_app_date] => 1999-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 1602 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271078.pdf [firstpage_image] =>[orig_patent_app_number] => 324949 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/324949
Simplifying conductive plate/via isolation Jun 2, 1999 Issued
Array ( [id] => 4351201 [patent_doc_number] => 06291354 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Method of fabricating a semiconductive device' [patent_app_type] => 1 [patent_app_number] => 9/315799 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2364 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291354.pdf [firstpage_image] =>[orig_patent_app_number] => 315799 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/315799
Method of fabricating a semiconductive device May 20, 1999 Issued
Array ( [id] => 1341882 [patent_doc_number] => 06582617 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-24 [patent_title] => 'Plasma etching using polycarbonate mask and low-pressure high density plasma' [patent_app_type] => B1 [patent_app_number] => 09/302170 [patent_app_country] => US [patent_app_date] => 1999-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5718 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/582/06582617.pdf [firstpage_image] =>[orig_patent_app_number] => 09302170 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/302170
Plasma etching using polycarbonate mask and low-pressure high density plasma Apr 28, 1999 Issued
Array ( [id] => 4352591 [patent_doc_number] => 06254794 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Etching solution for etching porous silicon, etching method using the etching solution and method of preparing semiconductor member using the etching solution' [patent_app_type] => 1 [patent_app_number] => 9/298054 [patent_app_country] => US [patent_app_date] => 1999-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 54 [patent_no_of_words] => 38783 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/254/06254794.pdf [firstpage_image] =>[orig_patent_app_number] => 298054 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/298054
Etching solution for etching porous silicon, etching method using the etching solution and method of preparing semiconductor member using the etching solution Apr 21, 1999 Issued
Array ( [id] => 4402106 [patent_doc_number] => 06238586 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Etching solution for etching porous silicon, etching method using the etching solution and method of preparing semiconductor member using the etching solution' [patent_app_type] => 1 [patent_app_number] => 9/298056 [patent_app_country] => US [patent_app_date] => 1999-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 54 [patent_no_of_words] => 38772 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/238/06238586.pdf [firstpage_image] =>[orig_patent_app_number] => 298056 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/298056
Etching solution for etching porous silicon, etching method using the etching solution and method of preparing semiconductor member using the etching solution Apr 21, 1999 Issued
Array ( [id] => 4084555 [patent_doc_number] => 06162732 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Method for reducing capacitance depletion during hemispherical grain polysilicon synthesis for DRAM' [patent_app_type] => 1 [patent_app_number] => 9/287959 [patent_app_country] => US [patent_app_date] => 1999-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 990 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/162/06162732.pdf [firstpage_image] =>[orig_patent_app_number] => 287959 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/287959
Method for reducing capacitance depletion during hemispherical grain polysilicon synthesis for DRAM Apr 6, 1999 Issued
Array ( [id] => 4087719 [patent_doc_number] => 06133150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/267376 [patent_app_country] => US [patent_app_date] => 1999-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 77 [patent_no_of_words] => 20764 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133150.pdf [firstpage_image] =>[orig_patent_app_number] => 267376 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/267376
Semiconductor device and method for manufacturing the same Mar 14, 1999 Issued
Array ( [id] => 4369484 [patent_doc_number] => 06287972 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'System and method for residue entrapment utilizing a polish and sacrificial fill for semiconductor fabrication' [patent_app_type] => 1 [patent_app_number] => 9/262439 [patent_app_country] => US [patent_app_date] => 1999-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6359 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/287/06287972.pdf [firstpage_image] =>[orig_patent_app_number] => 262439 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/262439
System and method for residue entrapment utilizing a polish and sacrificial fill for semiconductor fabrication Mar 3, 1999 Issued
Array ( [id] => 4272977 [patent_doc_number] => 06280924 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Planarization method using fluid composition including chelating agents' [patent_app_type] => 1 [patent_app_number] => 9/258415 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 6058 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/280/06280924.pdf [firstpage_image] =>[orig_patent_app_number] => 258415 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/258415
Planarization method using fluid composition including chelating agents Feb 25, 1999 Issued
Array ( [id] => 4239137 [patent_doc_number] => 06136218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Planarization fluid composition including chelating agents' [patent_app_type] => 1 [patent_app_number] => 9/259491 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 6068 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/136/06136218.pdf [firstpage_image] =>[orig_patent_app_number] => 259491 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/259491
Planarization fluid composition including chelating agents Feb 25, 1999 Issued
Array ( [id] => 1490349 [patent_doc_number] => 06417108 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Semiconductor substrate and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/238571 [patent_app_country] => US [patent_app_date] => 1999-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 49 [patent_no_of_words] => 8614 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/417/06417108.pdf [firstpage_image] =>[orig_patent_app_number] => 09238571 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/238571
Semiconductor substrate and method of manufacturing the same Jan 27, 1999 Issued
Array ( [id] => 4132010 [patent_doc_number] => 06121148 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Semiconductor device trench isolation structure with polysilicon bias voltage contact' [patent_app_type] => 1 [patent_app_number] => 9/236978 [patent_app_country] => US [patent_app_date] => 1999-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 22 [patent_no_of_words] => 4353 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121148.pdf [firstpage_image] =>[orig_patent_app_number] => 236978 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/236978
Semiconductor device trench isolation structure with polysilicon bias voltage contact Jan 25, 1999 Issued
Array ( [id] => 4216043 [patent_doc_number] => 06087273 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Process for selectively etching silicon nitride in the presence of silicon oxide' [patent_app_type] => 1 [patent_app_number] => 9/236825 [patent_app_country] => US [patent_app_date] => 1999-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2194 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087273.pdf [firstpage_image] =>[orig_patent_app_number] => 236825 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/236825
Process for selectively etching silicon nitride in the presence of silicon oxide Jan 24, 1999 Issued
Array ( [id] => 4352621 [patent_doc_number] => 06254796 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Selective etching of silicate' [patent_app_type] => 1 [patent_app_number] => 9/221596 [patent_app_country] => US [patent_app_date] => 1998-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/254/06254796.pdf [firstpage_image] =>[orig_patent_app_number] => 221596 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221596
Selective etching of silicate Dec 28, 1998 Issued
09/208143 POLISHING PLATEN RINSE FOR CONTROLLED PASSIVATION OF SILICON/POLYSILICON SURFACES Dec 8, 1998 Abandoned
Array ( [id] => 4271773 [patent_doc_number] => 06323135 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Method of forming reliable capped copper interconnects/with high etch selectivity to capping layer' [patent_app_type] => 1 [patent_app_number] => 9/207672 [patent_app_country] => US [patent_app_date] => 1998-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2984 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323135.pdf [firstpage_image] =>[orig_patent_app_number] => 207672 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/207672
Method of forming reliable capped copper interconnects/with high etch selectivity to capping layer Dec 8, 1998 Issued
Array ( [id] => 4095744 [patent_doc_number] => 06099748 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Silicon wafer etching method and silicon wafer etchant' [patent_app_type] => 1 [patent_app_number] => 9/207194 [patent_app_country] => US [patent_app_date] => 1998-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2937 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/099/06099748.pdf [firstpage_image] =>[orig_patent_app_number] => 207194 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/207194
Silicon wafer etching method and silicon wafer etchant Dec 7, 1998 Issued
Array ( [id] => 4302677 [patent_doc_number] => 06251784 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Real-time control of chemical-mechanical polishing processing by monitoring ionization current' [patent_app_type] => 1 [patent_app_number] => 9/206892 [patent_app_country] => US [patent_app_date] => 1998-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3232 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/251/06251784.pdf [firstpage_image] =>[orig_patent_app_number] => 206892 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206892
Real-time control of chemical-mechanical polishing processing by monitoring ionization current Dec 7, 1998 Issued
Array ( [id] => 4147359 [patent_doc_number] => 06123865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Method for improving etch uniformity during a wet etching process' [patent_app_type] => 1 [patent_app_number] => 9/206642 [patent_app_country] => US [patent_app_date] => 1998-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1549 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/123/06123865.pdf [firstpage_image] =>[orig_patent_app_number] => 206642 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206642
Method for improving etch uniformity during a wet etching process Dec 6, 1998 Issued
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