Search

Dung T Nguyen

Examiner (ID: 10437, Phone: (571)272-2297 , Office: P/2871 )

Most Active Art Unit
2871
Art Unit(s)
2871, 2828
Total Applications
3235
Issued Applications
2619
Pending Applications
178
Abandoned Applications
437

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16176722 [patent_doc_number] => 20200223690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => SELECTIVE WAFER REMOVAL PROCESS FOR WAFER BONDING APPLICATIONS [patent_app_type] => utility [patent_app_number] => 16/450138 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1559 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450138 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450138
Selective wafer removal process for wafer bonding applications Jun 23, 2019 Issued
Array ( [id] => 15745637 [patent_doc_number] => 20200111708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => PROCESS FOR MOLDING A BACK SIDE WAFER SINGULATION GUIDE [patent_app_type] => utility [patent_app_number] => 16/449885 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4058 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449885 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449885
Process for molding a back side wafer singulation guide Jun 23, 2019 Issued
Array ( [id] => 16845945 [patent_doc_number] => 11018041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Chip transferring method [patent_app_type] => utility [patent_app_number] => 16/450139 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4400 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450139 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450139
Chip transferring method Jun 23, 2019 Issued
Array ( [id] => 16789159 [patent_doc_number] => 10991598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Methods of fabricating semiconductor packages including circuit patterns [patent_app_type] => utility [patent_app_number] => 16/448372 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 12016 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16448372 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/448372
Methods of fabricating semiconductor packages including circuit patterns Jun 20, 2019 Issued
Array ( [id] => 15139121 [patent_doc_number] => 10483043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Apparatuses, multi-chip modules and capacitive chips [patent_app_type] => utility [patent_app_number] => 16/439036 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 6583 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439036 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439036
Apparatuses, multi-chip modules and capacitive chips Jun 11, 2019 Issued
Array ( [id] => 15641301 [patent_doc_number] => 10593655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Light bulb [patent_app_type] => utility [patent_app_number] => 16/436445 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 49 [patent_no_of_words] => 9687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436445 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/436445
Light bulb Jun 9, 2019 Issued
Array ( [id] => 14875319 [patent_doc_number] => 20190287901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => ELECTRICAL FUSE AND/OR RESISTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/427945 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16427945 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/427945
Electrical fuse and/or resistor structures May 30, 2019 Issued
Array ( [id] => 19245399 [patent_doc_number] => 12015862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Image sensor having pixels with isolated floating diffusions [patent_app_type] => utility [patent_app_number] => 17/058506 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 8555 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17058506 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/058506
Image sensor having pixels with isolated floating diffusions May 23, 2019 Issued
Array ( [id] => 16132503 [patent_doc_number] => 10700019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Semiconductor device with compressive interlayer [patent_app_type] => utility [patent_app_number] => 16/418006 [patent_app_country] => US [patent_app_date] => 2019-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 4159 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/418006
Semiconductor device with compressive interlayer May 20, 2019 Issued
Array ( [id] => 16132503 [patent_doc_number] => 10700019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Semiconductor device with compressive interlayer [patent_app_type] => utility [patent_app_number] => 16/418006 [patent_app_country] => US [patent_app_date] => 2019-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 4159 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/418006
Semiconductor device with compressive interlayer May 20, 2019 Issued
Array ( [id] => 16132503 [patent_doc_number] => 10700019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Semiconductor device with compressive interlayer [patent_app_type] => utility [patent_app_number] => 16/418006 [patent_app_country] => US [patent_app_date] => 2019-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 4159 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/418006
Semiconductor device with compressive interlayer May 20, 2019 Issued
Array ( [id] => 16132503 [patent_doc_number] => 10700019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Semiconductor device with compressive interlayer [patent_app_type] => utility [patent_app_number] => 16/418006 [patent_app_country] => US [patent_app_date] => 2019-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 4159 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/418006
Semiconductor device with compressive interlayer May 20, 2019 Issued
Array ( [id] => 16896499 [patent_doc_number] => 11038062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Semiconductor device with a fin-shaped active region and a gate electrode [patent_app_type] => utility [patent_app_number] => 16/416725 [patent_app_country] => US [patent_app_date] => 2019-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 19172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416725 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/416725
Semiconductor device with a fin-shaped active region and a gate electrode May 19, 2019 Issued
Array ( [id] => 16068089 [patent_doc_number] => 10693010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Semiconductor device and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/413860 [patent_app_country] => US [patent_app_date] => 2019-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 73 [patent_no_of_words] => 27637 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413860 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/413860
Semiconductor device and method for manufacturing semiconductor device May 15, 2019 Issued
Array ( [id] => 17310425 [patent_doc_number] => 11211552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Spin-orbit torque magnetoresistance effect element and magnetic memory [patent_app_type] => utility [patent_app_number] => 16/645055 [patent_app_country] => US [patent_app_date] => 2019-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 9311 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16645055 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/645055
Spin-orbit torque magnetoresistance effect element and magnetic memory May 12, 2019 Issued
Array ( [id] => 16284801 [patent_doc_number] => 20200278403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => SPIN-ORBIT-TORQUE MAGNETIZATION ROTATIONAL ELEMENT, SPIN-ORBIT-TORQUE TYPE MAGNETORESISTANCE EFFECT ELEMENT, AND MAGNETIC MEMORY [patent_app_type] => utility [patent_app_number] => 16/756388 [patent_app_country] => US [patent_app_date] => 2019-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9519 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16756388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/756388
Spin-orbit-torque magnetization rotational element, spin-orbit-torque type magnetoresistance effect element, and magnetic memory May 9, 2019 Issued
Array ( [id] => 15250203 [patent_doc_number] => 10510630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Molding structure for wafer level package [patent_app_type] => utility [patent_app_number] => 16/403869 [patent_app_country] => US [patent_app_date] => 2019-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16403869 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/403869
Molding structure for wafer level package May 5, 2019 Issued
Array ( [id] => 14753279 [patent_doc_number] => 20190259813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/401391 [patent_app_country] => US [patent_app_date] => 2019-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8707 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16401391 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/401391
Semiconductor memory device and method of manufacturing the same May 1, 2019 Issued
Array ( [id] => 14722297 [patent_doc_number] => 20190252212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => METHOD FOR MANUFACTURING AN ENCAPSULATION COVER FOR AN ELECTRONIC PACKAGE AND ELECTRONIC PACKAGE COMPRISING A COVER [patent_app_type] => utility [patent_app_number] => 16/394925 [patent_app_country] => US [patent_app_date] => 2019-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16394925 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/394925
Method for manufacturing an encapsulation cover for an electronic package and electronic package comprising a cover Apr 24, 2019 Issued
Array ( [id] => 16339415 [patent_doc_number] => 10790385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => High electron mobility transistor with reverse arrangement of channel layer and barrier layer [patent_app_type] => utility [patent_app_number] => 16/393689 [patent_app_country] => US [patent_app_date] => 2019-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5383 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16393689 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/393689
High electron mobility transistor with reverse arrangement of channel layer and barrier layer Apr 23, 2019 Issued
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