Search

Dung T Nguyen

Examiner (ID: 10437, Phone: (571)272-2297 , Office: P/2871 )

Most Active Art Unit
2871
Art Unit(s)
2871, 2828
Total Applications
3235
Issued Applications
2619
Pending Applications
178
Abandoned Applications
437

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15939233 [patent_doc_number] => 20200161250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => ILD GAP FILL FOR MEMORY DEVICE STACK ARRAY [patent_app_type] => utility [patent_app_number] => 16/193826 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193826 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193826
ILD gap fill for memory device stack array Nov 15, 2018 Issued
Array ( [id] => 15939827 [patent_doc_number] => 20200161547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => FILM STRESS CONTROL FOR MEMORY DEVICE STACK [patent_app_type] => utility [patent_app_number] => 16/193851 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193851 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193851
Film stress control for memory device stack Nov 15, 2018 Issued
Array ( [id] => 16464004 [patent_doc_number] => 10847363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Method of selective deposition for forming fully self-aligned vias [patent_app_type] => utility [patent_app_number] => 16/193833 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4735 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193833 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193833
Method of selective deposition for forming fully self-aligned vias Nov 15, 2018 Issued
Array ( [id] => 16896321 [patent_doc_number] => 11037883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Regulator circuit package techniques [patent_app_type] => utility [patent_app_number] => 16/193843 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193843 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193843
Regulator circuit package techniques Nov 15, 2018 Issued
Array ( [id] => 14509697 [patent_doc_number] => 20190198503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => SEMICONDUCTOR MEMORY DEVICES HAVING AN UNDERCUT SOURCE/DRAIN REGION [patent_app_type] => utility [patent_app_number] => 16/186781 [patent_app_country] => US [patent_app_date] => 2018-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4313 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186781 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186781
Semiconductor memory devices having an undercut source/drain region Nov 11, 2018 Issued
Array ( [id] => 14333253 [patent_doc_number] => 10297655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Display apparatus and method of manufacturing display apparatus [patent_app_type] => utility [patent_app_number] => 16/184224 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9762 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184224 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184224
Display apparatus and method of manufacturing display apparatus Nov 7, 2018 Issued
Array ( [id] => 15838273 [patent_doc_number] => 20200134419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => RECURRENT NEURON IMPLEMENTATION BASED ON MAGNETO-ELECTRIC SPIN ORBIT LOGIC [patent_app_type] => utility [patent_app_number] => 16/175238 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16175238 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/175238
Recurrent neuron implementation based on magneto-electric spin orbit logic Oct 29, 2018 Issued
Array ( [id] => 16254874 [patent_doc_number] => 20200264248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => MAGNETIC TUNNEL BARRIERS AND RELATED HETEROSTRUCTURE DEVICES AND METHODS [patent_app_type] => utility [patent_app_number] => 16/755539 [patent_app_country] => US [patent_app_date] => 2018-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16755539 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/755539
Magnetic tunnel barriers and related heterostructure devices and methods Oct 14, 2018 Issued
Array ( [id] => 16881383 [patent_doc_number] => 11031541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Spin-orbit torque type magnetization rotating element, spin-orbit torque type magnetoresistance effect element, and magnetic memory [patent_app_type] => utility [patent_app_number] => 16/338653 [patent_app_country] => US [patent_app_date] => 2018-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 6922 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16338653 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/338653
Spin-orbit torque type magnetization rotating element, spin-orbit torque type magnetoresistance effect element, and magnetic memory Oct 9, 2018 Issued
Array ( [id] => 13879023 [patent_doc_number] => 20190035852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/150321 [patent_app_country] => US [patent_app_date] => 2018-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8684 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16150321 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/150321
Semiconductor memory device and method of manufacturing the same Oct 2, 2018 Issued
Array ( [id] => 13909301 [patent_doc_number] => 20190043855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => LINEARITY AND LATERAL ISOLATION IN A BiCMOS PROCESS THROUGH COUNTER-DOPING OF EPITAXIAL SILICON REGION [patent_app_type] => utility [patent_app_number] => 16/147345 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147345 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/147345
Linearity and lateral isolation in a BiCMOS process through counter-doping of epitaxial silicon region Sep 27, 2018 Issued
Array ( [id] => 14110541 [patent_doc_number] => 20190096946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => IMAGING APPARATUS, METHOD OF MANUFACTURING THE SAME, AND DEVICE [patent_app_type] => utility [patent_app_number] => 16/137861 [patent_app_country] => US [patent_app_date] => 2018-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16137861 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/137861
Imaging apparatus, method of manufacturing the same, and device Sep 20, 2018 Issued
Array ( [id] => 15641235 [patent_doc_number] => 10593622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Electrical fuse and/or resistors structures [patent_app_type] => utility [patent_app_number] => 16/132922 [patent_app_country] => US [patent_app_date] => 2018-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 3778 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16132922 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/132922
Electrical fuse and/or resistors structures Sep 16, 2018 Issued
Array ( [id] => 14859337 [patent_doc_number] => 10418404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device [patent_app_type] => utility [patent_app_number] => 16/130666 [patent_app_country] => US [patent_app_date] => 2018-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 16660 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16130666 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/130666
Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic device Sep 12, 2018 Issued
Array ( [id] => 13996405 [patent_doc_number] => 20190067360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => Semiconductor Device and Electronic Device [patent_app_type] => utility [patent_app_number] => 16/122060 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122060 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122060
Semiconductor device including oxide semiconductor Sep 4, 2018 Issued
Array ( [id] => 16280235 [patent_doc_number] => 10763276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Three dimensional semiconductor memory including pillars having joint portions between columnar sections [patent_app_type] => utility [patent_app_number] => 16/118567 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 8558 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118567 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118567
Three dimensional semiconductor memory including pillars having joint portions between columnar sections Aug 30, 2018 Issued
Array ( [id] => 15030851 [patent_doc_number] => 20190326430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => POWER SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/118449 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118449 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118449
Power semiconductor device Aug 30, 2018 Issued
Array ( [id] => 16716028 [patent_doc_number] => 20210083175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SPIN-ORBIT-TORQUE MAGNETIZATION ROTATIONAL ELEMENT AND MAGNETIC MEMORY [patent_app_type] => utility [patent_app_number] => 16/629895 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8366 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16629895 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/629895
Spin-orbit-torque magnetization rotational element and magnetic memory Aug 30, 2018 Issued
Array ( [id] => 15540493 [patent_doc_number] => 10570011 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-25 [patent_title] => Method and system for fabricating a microelectromechanical system device with a movable portion using anodic etching of a sacrificial layer [patent_app_type] => utility [patent_app_number] => 16/117456 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2274 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16117456 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/117456
Method and system for fabricating a microelectromechanical system device with a movable portion using anodic etching of a sacrificial layer Aug 29, 2018 Issued
Array ( [id] => 16386653 [patent_doc_number] => 10811498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Method for making superlattice structures with reduced defect densities [patent_app_type] => utility [patent_app_number] => 16/117178 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 6739 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16117178 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/117178
Method for making superlattice structures with reduced defect densities Aug 29, 2018 Issued
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