Search

Dustin Nguyen

Examiner (ID: 7748, Phone: (571)272-3971 , Office: P/2446 )

Most Active Art Unit
2446
Art Unit(s)
2446, 2156, 2454, 2154, 2157
Total Applications
1089
Issued Applications
768
Pending Applications
88
Abandoned Applications
260

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11862005 [patent_doc_number] => 09741696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-22 [patent_title] => 'Thermal vias disposed in a substrate proximate to a well thereof' [patent_app_type] => utility [patent_app_number] => 15/174338 [patent_app_country] => US [patent_app_date] => 2016-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 9353 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15174338 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/174338
Thermal vias disposed in a substrate proximate to a well thereof Jun 5, 2016 Issued
Array ( [id] => 11079330 [patent_doc_number] => 20160276294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'INTEGRATED CIRCUIT ASSEMBLIES WITH REINFORCEMENT FRAMES, AND METHODS OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 15/165837 [patent_app_country] => US [patent_app_date] => 2016-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 10965 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15165837 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/165837
Integrated circuit assemblies with reinforcement frames, and methods of manufacture May 25, 2016 Issued
Array ( [id] => 12953608 [patent_doc_number] => 09837347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Coaxial copper pillar [patent_app_type] => utility [patent_app_number] => 15/074757 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 1216 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074757 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/074757
Coaxial copper pillar Mar 17, 2016 Issued
Array ( [id] => 11307604 [patent_doc_number] => 09515008 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Techniques for interconnecting stacked dies using connection sites' [patent_app_type] => utility [patent_app_number] => 15/019867 [patent_app_country] => US [patent_app_date] => 2016-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 79 [patent_no_of_words] => 38287 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15019867 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/019867
Techniques for interconnecting stacked dies using connection sites Feb 8, 2016 Issued
Array ( [id] => 11694431 [patent_doc_number] => 20170170148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'SELECTIVELY SOLUBLE STANDOFFS FOR CHIP JOINING' [patent_app_type] => utility [patent_app_number] => 14/969905 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4229 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969905 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/969905
Selectively soluble standoffs for chip joining Dec 14, 2015 Issued
Array ( [id] => 11014235 [patent_doc_number] => 20160211188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'SEMICONDUCTOR PACKAGES, METHODS OF MANUFACTURING THE SAME, ELECTRONIC SYSTEMS INCLUDING THE SAME, AND MEMORY CARDS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/808596 [patent_app_country] => US [patent_app_date] => 2015-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7407 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14808596 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/808596
Semiconductor packages, methods of manufacturing the same, electronic systems including the same, and memory cards including the same Jul 23, 2015 Issued
Array ( [id] => 10433232 [patent_doc_number] => 20150318244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING LOW DIELECTRIC INSULATING FILM AND MANUFACTURING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 14/750665 [patent_app_country] => US [patent_app_date] => 2015-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14750665 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/750665
Semiconductor device having low dielectric insulating film and manufacturing method of the same Jun 24, 2015 Issued
Array ( [id] => 10385245 [patent_doc_number] => 20150270252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'STACK PACKAGE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/734214 [patent_app_country] => US [patent_app_date] => 2015-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4472 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14734214 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/734214
Stack package and method for manufacturing the same Jun 8, 2015 Issued
Array ( [id] => 10689552 [patent_doc_number] => 20160035698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'STACK PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/719411 [patent_app_country] => US [patent_app_date] => 2015-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10041 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14719411 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/719411
STACK PACKAGE May 21, 2015 Abandoned
Array ( [id] => 10364052 [patent_doc_number] => 20150249057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-03 [patent_title] => 'Seal Ring Structure With A Metal Pad' [patent_app_type] => utility [patent_app_number] => 14/715087 [patent_app_country] => US [patent_app_date] => 2015-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4117 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14715087 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/715087
Seal ring structure with a metal pad May 17, 2015 Issued
Array ( [id] => 11861955 [patent_doc_number] => 09741644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-22 [patent_title] => 'Stacking arrangement for integration of multiple integrated circuits' [patent_app_type] => utility [patent_app_number] => 14/703734 [patent_app_country] => US [patent_app_date] => 2015-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 10750 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14703734 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/703734
Stacking arrangement for integration of multiple integrated circuits May 3, 2015 Issued
Array ( [id] => 11110822 [patent_doc_number] => 20160307793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'Interconnect Structures and Methods of Forming Same' [patent_app_type] => utility [patent_app_number] => 14/688895 [patent_app_country] => US [patent_app_date] => 2015-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5951 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14688895 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/688895
Interconnect structures and methods of forming same Apr 15, 2015 Issued
Array ( [id] => 11890995 [patent_doc_number] => 09761561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-12 [patent_title] => 'Edge structure for backgrinding asymmetrical bonded wafer' [patent_app_type] => utility [patent_app_number] => 14/660949 [patent_app_country] => US [patent_app_date] => 2015-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4016 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14660949 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/660949
Edge structure for backgrinding asymmetrical bonded wafer Mar 17, 2015 Issued
Array ( [id] => 11079308 [patent_doc_number] => 20160276272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/659170 [patent_app_country] => US [patent_app_date] => 2015-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4969 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14659170 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/659170
Semiconductor device structure and method for forming the same Mar 15, 2015 Issued
Array ( [id] => 12089031 [patent_doc_number] => 09842765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-12 [patent_title] => 'Semiconductor device structure and method for forming the same' [patent_app_type] => utility [patent_app_number] => 14/658525 [patent_app_country] => US [patent_app_date] => 2015-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4910 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14658525 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/658525
Semiconductor device structure and method for forming the same Mar 15, 2015 Issued
Array ( [id] => 10350976 [patent_doc_number] => 20150235981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'WIRE BONDING METHOD WITH TWO STEP FREE AIR BALL FORMATION' [patent_app_type] => utility [patent_app_number] => 14/552441 [patent_app_country] => US [patent_app_date] => 2014-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2469 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14552441 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/552441
WIRE BONDING METHOD WITH TWO STEP FREE AIR BALL FORMATION Nov 23, 2014 Abandoned
Array ( [id] => 10028731 [patent_doc_number] => 09070638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Semiconductor device having low dielectric insulating film and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 14/497944 [patent_app_country] => US [patent_app_date] => 2014-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 6642 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14497944 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/497944
Semiconductor device having low dielectric insulating film and manufacturing method of the same Sep 25, 2014 Issued
Array ( [id] => 9802896 [patent_doc_number] => 20150014841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-15 [patent_title] => 'HEAT-TRANSFER STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/491360 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8741 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491360 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491360
Heat-transfer structure Sep 18, 2014 Issued
Array ( [id] => 11911210 [patent_doc_number] => 09780031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Wiring structures' [patent_app_type] => utility [patent_app_number] => 14/477535 [patent_app_country] => US [patent_app_date] => 2014-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2769 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14477535 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/477535
Wiring structures Sep 3, 2014 Issued
Array ( [id] => 10440445 [patent_doc_number] => 20150325457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'Method of Packaging Semiconductor Devices and Apparatus for Performing the Same' [patent_app_type] => utility [patent_app_number] => 14/477366 [patent_app_country] => US [patent_app_date] => 2014-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14477366 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/477366
Method of Packaging Semiconductor Devices and Apparatus for Performing the Same Sep 3, 2014 Abandoned
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