Dustin Nguyen

Array ( [id] => 10285983 [patent_doc_number] => 20150170981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'PIXEL ARRAY SUBSTRATE AND DISPLAY PANEL' [patent_app_type] => utility [patent_app_number] => 14/164281 [patent_app_country] => US [patent_app_date] => 2014-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4743 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14164281 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9850802 [patent_doc_number] => 08952539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Methods for fabrication of an air gap-containing interconnect structure' [patent_app_type] => utility [patent_app_number] => 14/157098 [patent_app_country] => US [patent_app_date] => 2014-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 33 [patent_no_of_words] => 15390 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14157098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9418854 [patent_doc_number] => 20140103504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/141537 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8290 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141537 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9418894 [patent_doc_number] => 20140103544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/140656 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7702 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14140656 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10512811 [patent_doc_number] => 09240391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-19 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/140653 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5218 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14140653 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10294581 [patent_doc_number] => 20150179580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'HYBRID INTERCONNECT STRUCTURE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/139879 [patent_app_country] => US [patent_app_date] => 2013-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2141 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14139879 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12102099 [patent_doc_number] => 09859199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Method for forming semiconductor package using carbon nano material in molding compound' [patent_app_type] => utility [patent_app_number] => 14/132407 [patent_app_country] => US [patent_app_date] => 2013-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3499 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14132407 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11847525 [patent_doc_number] => 09735082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => '3DIC packaging with hot spot thermal management features' [patent_app_type] => utility [patent_app_number] => 14/096952 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 4900 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14096952 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10270232 [patent_doc_number] => 20150155229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'Leadless Semiconductor Package with Optical Inspection Feature' [patent_app_type] => utility [patent_app_number] => 14/094207 [patent_app_country] => US [patent_app_date] => 2013-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3983 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10260115 [patent_doc_number] => 20150145112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-28 [patent_title] => 'Electronic Component' [patent_app_type] => utility [patent_app_number] => 14/091917 [patent_app_country] => US [patent_app_date] => 2013-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7669 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14091917 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9363217 [patent_doc_number] => 20140073090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING LOW DIELECTRIC INSULATING FILM AND MANUFACTURING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 14/081303 [patent_app_country] => US [patent_app_date] => 2013-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6624 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14081303 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9590029 [patent_doc_number] => 08779572 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'On-chip heat spreader' [patent_app_type] => utility [patent_app_number] => 14/071937 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 5803 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14071937 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10525550 [patent_doc_number] => 09252070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Three-dimensional mounting semiconductor device and method of manufacturing three-dimensional mounting semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/041073 [patent_app_country] => US [patent_app_date] => 2013-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 39 [patent_no_of_words] => 8266 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14041073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12202419 [patent_doc_number] => 09905491 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-02-27 [patent_title] => 'Interposer substrate designs for semiconductor packages' [patent_app_type] => utility [patent_app_number] => 14/039938 [patent_app_country] => US [patent_app_date] => 2013-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 6181 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14039938 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9380968 [patent_doc_number] => 20140084449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'Semiconductor Housing with Rear-Side Structuring' [patent_app_type] => utility [patent_app_number] => 14/036110 [patent_app_country] => US [patent_app_date] => 2013-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1775 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14036110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9394038 [patent_doc_number] => 20140091444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'SEMICONDUCTOR UNIT AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/032690 [patent_app_country] => US [patent_app_date] => 2013-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2977 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14032690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9928483 [patent_doc_number] => 20150076675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'LEADFRAME PACKAGE WITH WETTABLE SIDES AND METHOD OF MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 14/027975 [patent_app_country] => US [patent_app_date] => 2013-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4768 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14027975 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9360520 [patent_doc_number] => 20140070392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'COMMON DRAIN POWER CLIP FOR BATTERY PACK PROTECTION MOSFET' [patent_app_type] => utility [patent_app_number] => 14/026181 [patent_app_country] => US [patent_app_date] => 2013-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3299 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14026181 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9291536 [patent_doc_number] => 20140035170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD' [patent_app_type] => utility [patent_app_number] => 13/969207 [patent_app_country] => US [patent_app_date] => 2013-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13969207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9161538 [patent_doc_number] => 20130309815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-21 [patent_title] => 'ISOSTRESS GRID ARRAY AND METHOD OF FABRICATION THEREOF' [patent_app_type] => utility [patent_app_number] => 13/951502 [patent_app_country] => US [patent_app_date] => 2013-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3169 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13951502 [rel_patent_id] =>[rel_patent_doc_number] =>)