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Duy T. V. Nguyen

Examiner (ID: 10805, Phone: (571)270-7431 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2818, 4136, 2894
Total Applications
1217
Issued Applications
888
Pending Applications
152
Abandoned Applications
240

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19366065 [patent_doc_number] => 20240268099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/164634 [patent_app_country] => US [patent_app_date] => 2023-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18164634 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/164634
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Feb 5, 2023 Pending
Array ( [id] => 18789428 [patent_doc_number] => 20230378094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR PACKAGE AND PACKAGE-ON-PACKAGE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 18/104650 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18104650 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/104650
SEMICONDUCTOR PACKAGE AND PACKAGE-ON-PACKAGE HAVING THE SAME Jan 31, 2023 Pending
Array ( [id] => 19023158 [patent_doc_number] => 20240079329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => INTEGRATED CIRCUIT DEVICES INCLUDING A BACK SIDE POWER DISTRIBUTION NETWORK STRUCTURE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/162920 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162920 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162920
INTEGRATED CIRCUIT DEVICES INCLUDING A BACK SIDE POWER DISTRIBUTION NETWORK STRUCTURE AND METHODS OF FORMING THE SAME Jan 31, 2023 Pending
Array ( [id] => 19023158 [patent_doc_number] => 20240079329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => INTEGRATED CIRCUIT DEVICES INCLUDING A BACK SIDE POWER DISTRIBUTION NETWORK STRUCTURE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/162920 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162920 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162920
INTEGRATED CIRCUIT DEVICES INCLUDING A BACK SIDE POWER DISTRIBUTION NETWORK STRUCTURE AND METHODS OF FORMING THE SAME Jan 31, 2023 Pending
Array ( [id] => 18425992 [patent_doc_number] => 20230180457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/162997 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162997 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162997
METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE Jan 31, 2023 Pending
Array ( [id] => 19023158 [patent_doc_number] => 20240079329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => INTEGRATED CIRCUIT DEVICES INCLUDING A BACK SIDE POWER DISTRIBUTION NETWORK STRUCTURE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/162920 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162920 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162920
INTEGRATED CIRCUIT DEVICES INCLUDING A BACK SIDE POWER DISTRIBUTION NETWORK STRUCTURE AND METHODS OF FORMING THE SAME Jan 31, 2023 Pending
Array ( [id] => 18425992 [patent_doc_number] => 20230180457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/162997 [patent_app_country] => US [patent_app_date] => 2023-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162997 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162997
METHOD FOR FORMING CAPACITOR AND SEMICONDUCTOR DEVICE Jan 31, 2023 Pending
Array ( [id] => 19349338 [patent_doc_number] => 20240258302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DIE PACKAGE AND METHODS OF FORMATION [patent_app_type] => utility [patent_app_number] => 18/162318 [patent_app_country] => US [patent_app_date] => 2023-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162318 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162318
SEMICONDUCTOR DIE PACKAGE AND METHODS OF FORMATION Jan 30, 2023 Pending
Array ( [id] => 18993001 [patent_doc_number] => 20240064970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME, AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/161985 [patent_app_country] => US [patent_app_date] => 2023-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13080 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18161985 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/161985
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME, AND MEMORY Jan 30, 2023 Pending
Array ( [id] => 19349338 [patent_doc_number] => 20240258302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DIE PACKAGE AND METHODS OF FORMATION [patent_app_type] => utility [patent_app_number] => 18/162318 [patent_app_country] => US [patent_app_date] => 2023-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162318 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162318
SEMICONDUCTOR DIE PACKAGE AND METHODS OF FORMATION Jan 30, 2023 Pending
Array ( [id] => 19349338 [patent_doc_number] => 20240258302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DIE PACKAGE AND METHODS OF FORMATION [patent_app_type] => utility [patent_app_number] => 18/162318 [patent_app_country] => US [patent_app_date] => 2023-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162318 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162318
SEMICONDUCTOR DIE PACKAGE AND METHODS OF FORMATION Jan 30, 2023 Pending
Array ( [id] => 18851106 [patent_doc_number] => 20230413510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/161463 [patent_app_country] => US [patent_app_date] => 2023-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8488 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18161463 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/161463
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE Jan 29, 2023 Pending
Array ( [id] => 18961119 [patent_doc_number] => 20240049446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SEMICONDUCTOR DEVICE, METHOD FOR OPERATING SAME, AND SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/161130 [patent_app_country] => US [patent_app_date] => 2023-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18161130 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/161130
SEMICONDUCTOR DEVICE, METHOD FOR OPERATING SAME, AND SEMICONDUCTOR STRUCTURE Jan 29, 2023 Issued
Array ( [id] => 18943733 [patent_doc_number] => 20240038872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => GATE PROFILE TUNING FOR MULTIGATE DEVICE [patent_app_type] => utility [patent_app_number] => 18/153700 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15972 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153700 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153700
GATE PROFILE TUNING FOR MULTIGATE DEVICE Jan 11, 2023 Pending
Array ( [id] => 18600298 [patent_doc_number] => 20230275099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/152054 [patent_app_country] => US [patent_app_date] => 2023-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 43930 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18152054 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/152054
DISPLAY DEVICE Jan 8, 2023 Pending
Array ( [id] => 18663263 [patent_doc_number] => 20230309289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/094719 [patent_app_country] => US [patent_app_date] => 2023-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14801 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18094719 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/094719
SEMICONDUCTOR MEMORY DEVICE Jan 8, 2023 Pending
Array ( [id] => 19008019 [patent_doc_number] => 20240072090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => STACKED CMOS IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 18/150372 [patent_app_country] => US [patent_app_date] => 2023-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18150372 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/150372
STACKED CMOS IMAGE SENSOR Jan 4, 2023 Pending
Array ( [id] => 19008019 [patent_doc_number] => 20240072090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => STACKED CMOS IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 18/150372 [patent_app_country] => US [patent_app_date] => 2023-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18150372 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/150372
STACKED CMOS IMAGE SENSOR Jan 4, 2023 Pending
Array ( [id] => 19285784 [patent_doc_number] => 20240222261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/150184 [patent_app_country] => US [patent_app_date] => 2023-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18150184 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/150184
SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF Jan 3, 2023 Pending
Array ( [id] => 18338677 [patent_doc_number] => 20230130626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERS [patent_app_type] => utility [patent_app_number] => 18/088602 [patent_app_country] => US [patent_app_date] => 2022-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 79664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18088602 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/088602
3D semiconductor device and structure with single-crystal layers Dec 24, 2022 Issued
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