Search

Dzung C. Nguyen

Examiner (ID: 6042)

Most Active Art Unit
2783
Art Unit(s)
2183, 2302, 2652, 2783
Total Applications
383
Issued Applications
298
Pending Applications
26
Abandoned Applications
59

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3849178 [patent_doc_number] => 05815664 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Address reporting device and method for detecting authorized and unauthorized addresses in a network environment' [patent_app_type] => 1 [patent_app_number] => 8/618211 [patent_app_country] => US [patent_app_date] => 1996-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 17373 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/815/05815664.pdf [firstpage_image] =>[orig_patent_app_number] => 618211 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/618211
Address reporting device and method for detecting authorized and unauthorized addresses in a network environment Mar 18, 1996 Issued
Array ( [id] => 4422682 [patent_doc_number] => 06233704 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'System and method for fault-tolerant transmission of data within a dual ring network' [patent_app_type] => 1 [patent_app_number] => 8/614860 [patent_app_country] => US [patent_app_date] => 1996-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3612 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/233/06233704.pdf [firstpage_image] =>[orig_patent_app_number] => 614860 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/614860
System and method for fault-tolerant transmission of data within a dual ring network Mar 12, 1996 Issued
Array ( [id] => 4088830 [patent_doc_number] => 06070237 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Method for performing population counts on packed data types' [patent_app_type] => 1 [patent_app_number] => 8/609899 [patent_app_country] => US [patent_app_date] => 1996-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 7462 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/070/06070237.pdf [firstpage_image] =>[orig_patent_app_number] => 609899 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/609899
Method for performing population counts on packed data types Mar 3, 1996 Issued
08/603692 INTERFACE ALLOWING USE OF A NON-PCI STANDARD RESOURCE ON A PCI STANDARD BUS Feb 19, 1996 Abandoned
Array ( [id] => 3887204 [patent_doc_number] => 05838907 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Configuration manager for network devices and an associated method for providing configuration information thereto' [patent_app_type] => 1 [patent_app_number] => 8/603062 [patent_app_country] => US [patent_app_date] => 1996-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 9983 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838907.pdf [firstpage_image] =>[orig_patent_app_number] => 603062 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/603062
Configuration manager for network devices and an associated method for providing configuration information thereto Feb 19, 1996 Issued
Array ( [id] => 3767473 [patent_doc_number] => 05721880 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Small computer system emulator for non-local SCSI devices' [patent_app_type] => 1 [patent_app_number] => 8/603660 [patent_app_country] => US [patent_app_date] => 1996-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4011 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721880.pdf [firstpage_image] =>[orig_patent_app_number] => 603660 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/603660
Small computer system emulator for non-local SCSI devices Feb 19, 1996 Issued
Array ( [id] => 3761389 [patent_doc_number] => 05717945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Method for creating documents with an open document architecture' [patent_app_type] => 1 [patent_app_number] => 8/596779 [patent_app_country] => US [patent_app_date] => 1996-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 5633 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717945.pdf [firstpage_image] =>[orig_patent_app_number] => 596779 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/596779
Method for creating documents with an open document architecture Feb 4, 1996 Issued
Array ( [id] => 3794558 [patent_doc_number] => 05809294 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Parallel processing unit which processes branch instructions without decreased performance when a branch is taken' [patent_app_type] => 1 [patent_app_number] => 8/594358 [patent_app_country] => US [patent_app_date] => 1996-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 39 [patent_no_of_words] => 12939 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809294.pdf [firstpage_image] =>[orig_patent_app_number] => 594358 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594358
Parallel processing unit which processes branch instructions without decreased performance when a branch is taken Jan 29, 1996 Issued
Array ( [id] => 3812335 [patent_doc_number] => 05781793 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Appratus for preventing changes of computer configuration data by unauthorized users' [patent_app_type] => 1 [patent_app_number] => 8/594007 [patent_app_country] => US [patent_app_date] => 1996-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3825 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/781/05781793.pdf [firstpage_image] =>[orig_patent_app_number] => 594007 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594007
Appratus for preventing changes of computer configuration data by unauthorized users Jan 29, 1996 Issued
Array ( [id] => 3633978 [patent_doc_number] => 05615387 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Method and apparatus for reworking printed circuit boards using surface coating and selective removal of an electrically conductive material' [patent_app_type] => 1 [patent_app_number] => 8/589795 [patent_app_country] => US [patent_app_date] => 1996-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/615/05615387.pdf [firstpage_image] =>[orig_patent_app_number] => 589795 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/589795
Method and apparatus for reworking printed circuit boards using surface coating and selective removal of an electrically conductive material Jan 21, 1996 Issued
Array ( [id] => 3759438 [patent_doc_number] => 05754875 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Computer system with double width data bus' [patent_app_type] => 1 [patent_app_number] => 8/588694 [patent_app_country] => US [patent_app_date] => 1996-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2602 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754875.pdf [firstpage_image] =>[orig_patent_app_number] => 588694 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/588694
Computer system with double width data bus Jan 18, 1996 Issued
Array ( [id] => 3633965 [patent_doc_number] => 05615386 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Computer architecture for reducing delays due to branch instructions' [patent_app_type] => 1 [patent_app_number] => 8/588151 [patent_app_country] => US [patent_app_date] => 1996-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6165 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/615/05615386.pdf [firstpage_image] =>[orig_patent_app_number] => 588151 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/588151
Computer architecture for reducing delays due to branch instructions Jan 17, 1996 Issued
Array ( [id] => 3612856 [patent_doc_number] => 05560019 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-24 [patent_title] => 'Method and apparatus for handling interrupts in a multiprocessor computer system' [patent_app_type] => 1 [patent_app_number] => 8/586539 [patent_app_country] => US [patent_app_date] => 1996-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6218 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/560/05560019.pdf [firstpage_image] =>[orig_patent_app_number] => 586539 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/586539
Method and apparatus for handling interrupts in a multiprocessor computer system Jan 15, 1996 Issued
Array ( [id] => 3756205 [patent_doc_number] => 05787300 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Method and apparatus for interprocess communications in a database environment' [patent_app_type] => 1 [patent_app_number] => 8/584910 [patent_app_country] => US [patent_app_date] => 1996-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 5948 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787300.pdf [firstpage_image] =>[orig_patent_app_number] => 584910 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/584910
Method and apparatus for interprocess communications in a database environment Jan 10, 1996 Issued
Array ( [id] => 3849090 [patent_doc_number] => 05815659 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Network data server for use with programmable logic controllers and programmable logic controller system formed using such network data servers' [patent_app_type] => 1 [patent_app_number] => 8/583502 [patent_app_country] => US [patent_app_date] => 1996-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 15882 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/815/05815659.pdf [firstpage_image] =>[orig_patent_app_number] => 583502 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/583502
Network data server for use with programmable logic controllers and programmable logic controller system formed using such network data servers Jan 4, 1996 Issued
Array ( [id] => 3850186 [patent_doc_number] => 05815727 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Parallel processor for executing plural thread program in parallel using virtual thread numbers' [patent_app_type] => 1 [patent_app_number] => 8/575860 [patent_app_country] => US [patent_app_date] => 1995-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 14101 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/815/05815727.pdf [firstpage_image] =>[orig_patent_app_number] => 575860 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/575860
Parallel processor for executing plural thread program in parallel using virtual thread numbers Dec 19, 1995 Issued
Array ( [id] => 3826929 [patent_doc_number] => 05832291 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Data processor with dynamic and selectable interconnections between processor array, external memory and I/O ports' [patent_app_type] => 1 [patent_app_number] => 8/572932 [patent_app_country] => US [patent_app_date] => 1995-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4434 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/832/05832291.pdf [firstpage_image] =>[orig_patent_app_number] => 572932 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/572932
Data processor with dynamic and selectable interconnections between processor array, external memory and I/O ports Dec 14, 1995 Issued
Array ( [id] => 3717369 [patent_doc_number] => 05675824 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Programmable logic having selectable output voltages' [patent_app_type] => 1 [patent_app_number] => 8/573584 [patent_app_country] => US [patent_app_date] => 1995-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4487 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675824.pdf [firstpage_image] =>[orig_patent_app_number] => 573584 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/573584
Programmable logic having selectable output voltages Dec 14, 1995 Issued
08/559507 MASSIVELY PARALLEL COMPUTER INCLUDING AUXILIARY VECTOR PROCESSOR Nov 14, 1995 Abandoned
Array ( [id] => 3818165 [patent_doc_number] => 05854903 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Optimization method for routing and logical network design in multi-service networks' [patent_app_type] => 1 [patent_app_number] => 8/554502 [patent_app_country] => US [patent_app_date] => 1995-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11251 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854903.pdf [firstpage_image] =>[orig_patent_app_number] => 554502 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/554502
Optimization method for routing and logical network design in multi-service networks Nov 6, 1995 Issued
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