Search

Earl N. Taylor

Examiner (ID: 10740, Phone: (571)272-8894 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818, 2896
Total Applications
1234
Issued Applications
1048
Pending Applications
89
Abandoned Applications
135

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17764770 [patent_doc_number] => 20220238383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => NON-PLANAR I/O AND LOGIC SEMICONDUCTOR DEVICES HAVING DIFFERENT WORKFUNCTION ON COMMON SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/720150 [patent_app_country] => US [patent_app_date] => 2022-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17720150 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/720150
Non-planar I/O and logic semiconductor devices having different workfunction on common substrate Apr 12, 2022 Issued
Array ( [id] => 17752973 [patent_doc_number] => 20220231178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => METHOD AND OPTOELECTRONIC STRUCTURE PROVIDING POLYSILICON PHOTONIC DEVICES WITH DIFFERENT OPTICAL PROPERTIES IN DIFFERENT REGIONS [patent_app_type] => utility [patent_app_number] => 17/711728 [patent_app_country] => US [patent_app_date] => 2022-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17711728 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/711728
METHOD AND OPTOELECTRONIC STRUCTURE PROVIDING POLYSILICON PHOTONIC DEVICES WITH DIFFERENT OPTICAL PROPERTIES IN DIFFERENT REGIONS Mar 31, 2022 Pending
Array ( [id] => 19429950 [patent_doc_number] => 12089403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells [patent_app_type] => utility [patent_app_number] => 17/590266 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 7656 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17590266 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/590266
Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells Jan 31, 2022 Issued
Array ( [id] => 17615669 [patent_doc_number] => 20220157949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SEMICONDUCTOR DEVICE HAVING BACKSIDE VIA AND METHOD OF FABRICATING THEREOF [patent_app_type] => utility [patent_app_number] => 17/649312 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649312 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649312
Semiconductor device having backside via and method of fabricating thereof Jan 27, 2022 Issued
Array ( [id] => 17615669 [patent_doc_number] => 20220157949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SEMICONDUCTOR DEVICE HAVING BACKSIDE VIA AND METHOD OF FABRICATING THEREOF [patent_app_type] => utility [patent_app_number] => 17/649312 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649312 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649312
Semiconductor device having backside via and method of fabricating thereof Jan 27, 2022 Issued
Array ( [id] => 17615669 [patent_doc_number] => 20220157949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SEMICONDUCTOR DEVICE HAVING BACKSIDE VIA AND METHOD OF FABRICATING THEREOF [patent_app_type] => utility [patent_app_number] => 17/649312 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649312 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649312
Semiconductor device having backside via and method of fabricating thereof Jan 27, 2022 Issued
Array ( [id] => 17599391 [patent_doc_number] => 20220148965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING VIA AND WIRING [patent_app_type] => utility [patent_app_number] => 17/648829 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648829 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648829
Semiconductor device including via and wiring Jan 24, 2022 Issued
Array ( [id] => 18304370 [patent_doc_number] => 11626283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Compound semiconductor substrate, a pellicle film, and a method for manufacturing a compound semiconductor substrate [patent_app_type] => utility [patent_app_number] => 17/580299 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 14197 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17580299 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/580299
Compound semiconductor substrate, a pellicle film, and a method for manufacturing a compound semiconductor substrate Jan 19, 2022 Issued
Array ( [id] => 17583323 [patent_doc_number] => 20220140178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/578868 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578868 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/578868
Solar cell and method for manufacturing the same Jan 18, 2022 Issued
Array ( [id] => 18488601 [patent_doc_number] => 20230215949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => UPPER AND LOWER GATE CONFIGURATIONS OF MONOLITHIC STACKED FINFET TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/569846 [patent_app_country] => US [patent_app_date] => 2022-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17029 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569846 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569846
Upper and lower gate configurations of monolithic stacked FinFET transistors Jan 5, 2022 Issued
Array ( [id] => 18488601 [patent_doc_number] => 20230215949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => UPPER AND LOWER GATE CONFIGURATIONS OF MONOLITHIC STACKED FINFET TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/569846 [patent_app_country] => US [patent_app_date] => 2022-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17029 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569846 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569846
Upper and lower gate configurations of monolithic stacked FinFET transistors Jan 5, 2022 Issued
Array ( [id] => 18488601 [patent_doc_number] => 20230215949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => UPPER AND LOWER GATE CONFIGURATIONS OF MONOLITHIC STACKED FINFET TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/569846 [patent_app_country] => US [patent_app_date] => 2022-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17029 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569846 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569846
Upper and lower gate configurations of monolithic stacked FinFET transistors Jan 5, 2022 Issued
Array ( [id] => 18081232 [patent_doc_number] => 20220406844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => RESISTIVE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/568866 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17568866 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/568866
Resistive memory device Jan 4, 2022 Issued
Array ( [id] => 17536930 [patent_doc_number] => 20220115539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/560804 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560804 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560804
Semiconductor devices Dec 22, 2021 Issued
Array ( [id] => 20260685 [patent_doc_number] => 12433056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-30 [patent_title] => Planar germanium photodetector [patent_app_type] => utility [patent_app_number] => 17/555670 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 2385 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555670 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/555670
Planar germanium photodetector Dec 19, 2021 Issued
Array ( [id] => 17709022 [patent_doc_number] => 20220209030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => METHOD OF MANUFACTURING SOLAR CELL WITH INCREASED POWER GENERATION AREA [patent_app_type] => utility [patent_app_number] => 17/556171 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17556171 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/556171
Method of manufacturing solar cell with increased power generation area Dec 19, 2021 Issued
Array ( [id] => 18362123 [patent_doc_number] => 20230143714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => SOLAR CELL AND PHOTOVOLTAIC MODULE [patent_app_type] => utility [patent_app_number] => 17/549029 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549029 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/549029
Solar cell and photovoltaic module Dec 12, 2021 Issued
Array ( [id] => 19079653 [patent_doc_number] => 11949035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Integrated circuit comprising a single photon avalanche diode and corresponding manufacturing method [patent_app_type] => utility [patent_app_number] => 17/546503 [patent_app_country] => US [patent_app_date] => 2021-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5258 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17546503 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/546503
Integrated circuit comprising a single photon avalanche diode and corresponding manufacturing method Dec 8, 2021 Issued
Array ( [id] => 19071452 [patent_doc_number] => 20240105878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => METHOD FOR PRODUCING A PHOTODIODE [patent_app_type] => utility [patent_app_number] => 18/038780 [patent_app_country] => US [patent_app_date] => 2021-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18038780 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/038780
METHOD FOR PRODUCING A PHOTODIODE Dec 2, 2021 Pending
Array ( [id] => 19071452 [patent_doc_number] => 20240105878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => METHOD FOR PRODUCING A PHOTODIODE [patent_app_type] => utility [patent_app_number] => 18/038780 [patent_app_country] => US [patent_app_date] => 2021-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18038780 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/038780
METHOD FOR PRODUCING A PHOTODIODE Dec 2, 2021 Pending
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