Search

Ebony E Evans

Examiner (ID: 8851, Phone: (571)270-1157 , Office: P/3647 )

Most Active Art Unit
3647
Art Unit(s)
3645, 3644, 3647
Total Applications
965
Issued Applications
575
Pending Applications
54
Abandoned Applications
336

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17157371 [patent_doc_number] => 20210318422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => METHOD AND APPARATUS FOR DETECTING SIGNAL PROPAGATION TYPE [patent_app_type] => utility [patent_app_number] => 17/272407 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17272407 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/272407
METHOD AND APPARATUS FOR DETECTING SIGNAL PROPAGATION TYPE Aug 30, 2018 Pending
Array ( [id] => 13405341 [patent_doc_number] => 20180254213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => MICROELECTRONIC ELEMENTS WITH POST-ASSEMBLY PLANARIZATION [patent_app_type] => utility [patent_app_number] => 15/971466 [patent_app_country] => US [patent_app_date] => 2018-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18479 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15971466 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/971466
Microelectronic elements with post-assembly planarization May 3, 2018 Issued
Array ( [id] => 16812560 [patent_doc_number] => 20210135115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => PHOTOCROSSLINKABLE POLYMER, INSULATING FILM, PLANARIZATION FILM, LYOPHILIC/LIQUID REPELLENT PATTERNED FILM, AND ORGANIC FIELD EFFECT TRANSISTOR DEVICE COMPRISING SAME [patent_app_type] => utility [patent_app_number] => 16/494107 [patent_app_country] => US [patent_app_date] => 2018-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17233 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16494107 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/494107
PHOTOCROSSLINKABLE POLYMER, INSULATING FILM, PLANARIZATION FILM, LYOPHILIC/LIQUID REPELLENT PATTERNED FILM, AND ORGANIC FIELD EFFECT TRANSISTOR DEVICE COMPRISING SAME Mar 8, 2018 Pending
Array ( [id] => 16521727 [patent_doc_number] => 10872953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Nanosheet substrate isolated source/drain epitaxy by counter-doped bottom epitaxy [patent_app_type] => utility [patent_app_number] => 15/872610 [patent_app_country] => US [patent_app_date] => 2018-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6677 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15872610 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/872610
Nanosheet substrate isolated source/drain epitaxy by counter-doped bottom epitaxy Jan 15, 2018 Issued
Array ( [id] => 16148181 [patent_doc_number] => 10707167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Contacts to semiconductor substrate and methods of forming same [patent_app_type] => utility [patent_app_number] => 15/826939 [patent_app_country] => US [patent_app_date] => 2017-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4896 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826939 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/826939
Contacts to semiconductor substrate and methods of forming same Nov 29, 2017 Issued
Array ( [id] => 12561231 [patent_doc_number] => 10015974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-10 [patent_title] => Processing line and method for inspecting poultry carcasses and/or viscera packages [patent_app_type] => utility [patent_app_number] => 15/703263 [patent_app_country] => US [patent_app_date] => 2017-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2809 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15703263 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/703263
Processing line and method for inspecting poultry carcasses and/or viscera packages Sep 12, 2017 Issued
Array ( [id] => 13709533 [patent_doc_number] => 20170365721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => DIODES AND FABRICATION METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 15/674859 [patent_app_country] => US [patent_app_date] => 2017-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15674859 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/674859
DIODES AND FABRICATION METHODS THEREOF Aug 10, 2017 Abandoned
Array ( [id] => 14529703 [patent_doc_number] => 10342133 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Display device having a first area, a second area adjacent to the first area, and a third area adjacent to the second area [patent_app_type] => utility [patent_app_number] => 15/635680 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7335 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15635680 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/635680
Display device having a first area, a second area adjacent to the first area, and a third area adjacent to the second area Jun 27, 2017 Issued
Array ( [id] => 10659703 [patent_doc_number] => 20160005847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/854741 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8019 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14854741 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/854741
SEMICONDUCTOR APPARATUS Sep 14, 2015 Abandoned
Array ( [id] => 14672005 [patent_doc_number] => 10373922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Methods of manufacturing a multi-device package [patent_app_type] => utility [patent_app_number] => 14/731382 [patent_app_country] => US [patent_app_date] => 2015-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6620 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14731382 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/731382
Methods of manufacturing a multi-device package Jun 3, 2015 Issued
Array ( [id] => 10433026 [patent_doc_number] => 20150318038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'PHASE CHANGE MEMORY STACK WITH TREATED SIDEWALLS' [patent_app_type] => utility [patent_app_number] => 14/266456 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 1976 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14266456 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/266456
Phase change memory stack with treated sidewalls Apr 29, 2014 Issued
Array ( [id] => 9668123 [patent_doc_number] => 20140231986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'THROUGH SUBSTRATE VIA (TSUV) STRUCTURES AND METHOD OF MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/260064 [patent_app_country] => US [patent_app_date] => 2014-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11343 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14260064 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/260064
THROUGH SUBSTRATE VIA (TSUV) STRUCTURES AND METHOD OF MAKING THE SAME Apr 22, 2014 Abandoned
Array ( [id] => 8913917 [patent_doc_number] => 20130175542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'Group III-V and Group IV Composite Diode' [patent_app_type] => utility [patent_app_number] => 13/781080 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5682 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13781080 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/781080
Group III-V and Group IV Composite Diode Feb 27, 2013 Abandoned
Array ( [id] => 8901154 [patent_doc_number] => 20130168657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'THIN FILM TRANSISTOR ON FIBER AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/734552 [patent_app_country] => US [patent_app_date] => 2013-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2353 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13734552 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/734552
THIN FILM TRANSISTOR ON FIBER AND METHOD OF MANUFACTURING THE SAME Jan 3, 2013 Abandoned
Array ( [id] => 8139723 [patent_doc_number] => 20120094407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'WAFER LEVEL LED PACKAGE STRUCTURE FOR INCREASING LIGHT-EMITTING EFFICIENCY AND HEAT-DISSIPATING EFFECT AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/328083 [patent_app_country] => US [patent_app_date] => 2011-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4487 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20120094407.pdf [firstpage_image] =>[orig_patent_app_number] => 13328083 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/328083
WAFER LEVEL LED PACKAGE STRUCTURE FOR INCREASING LIGHT-EMITTING EFFICIENCY AND HEAT-DISSIPATING EFFECT AND METHOD FOR MANUFACTURING THE SAME Dec 15, 2011 Abandoned
Array ( [id] => 8164270 [patent_doc_number] => 08173495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'Semiconductor on insulator' [patent_app_type] => utility [patent_app_number] => 12/911649 [patent_app_country] => US [patent_app_date] => 2010-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4147 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/173/08173495.pdf [firstpage_image] =>[orig_patent_app_number] => 12911649 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/911649
Semiconductor on insulator Oct 24, 2010 Issued
Array ( [id] => 5948309 [patent_doc_number] => 20110031533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/909300 [patent_app_country] => US [patent_app_date] => 2010-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 7911 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20110031533.pdf [firstpage_image] =>[orig_patent_app_number] => 12909300 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/909300
Semiconductor device Oct 20, 2010 Issued
Array ( [id] => 6602470 [patent_doc_number] => 20100309708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 12/856850 [patent_app_country] => US [patent_app_date] => 2010-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 12508 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20100309708.pdf [firstpage_image] =>[orig_patent_app_number] => 12856850 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/856850
Semiconductor memory Aug 15, 2010 Issued
Array ( [id] => 5993135 [patent_doc_number] => 20110014788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'Display panel structure and manufacture method thereof' [patent_app_type] => utility [patent_app_number] => 12/855837 [patent_app_country] => US [patent_app_date] => 2010-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6231 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20110014788.pdf [firstpage_image] =>[orig_patent_app_number] => 12855837 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/855837
Display panel structure and manufacture method thereof Aug 12, 2010 Issued
Array ( [id] => 6384219 [patent_doc_number] => 20100302740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'Methods of cooling semiconductor dies' [patent_app_type] => utility [patent_app_number] => 12/855562 [patent_app_country] => US [patent_app_date] => 2010-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6118 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20100302740.pdf [firstpage_image] =>[orig_patent_app_number] => 12855562 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/855562
Methods of cooling semiconductor dies Aug 11, 2010 Issued
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