Search

Eddie P. Chan

Examiner (ID: 4047)

Most Active Art Unit
2307
Art Unit(s)
2307, 2101, 2751, 2183, 2316
Total Applications
716
Issued Applications
479
Pending Applications
12
Abandoned Applications
224

Applications

Application numberTitle of the applicationFiling DateStatus
07/394103 METHOD AND SYSTEM FOR NETWORK COMMUNICATIONS USING RAW MODE PROTOCOLS Aug 13, 1989 Abandoned
Array ( [id] => 2880991 [patent_doc_number] => 05091845 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-25 [patent_title] => 'System for controlling the storage of information in a cache memory' [patent_app_type] => 1 [patent_app_number] => 7/392783 [patent_app_country] => US [patent_app_date] => 1989-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 21261 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/091/05091845.pdf [firstpage_image] =>[orig_patent_app_number] => 392783 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/392783
System for controlling the storage of information in a cache memory Aug 10, 1989 Issued
Array ( [id] => 2883001 [patent_doc_number] => 05163148 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-10 [patent_title] => 'File backup system for producing a backup copy of a file which may be updated during backup' [patent_app_type] => 1 [patent_app_number] => 7/392419 [patent_app_country] => US [patent_app_date] => 1989-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4916 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/163/05163148.pdf [firstpage_image] =>[orig_patent_app_number] => 392419 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/392419
File backup system for producing a backup copy of a file which may be updated during backup Aug 10, 1989 Issued
07/387341 PROCESS AND APPARATUS FOR REDUCING POWER USAGE MICROPROCESSOR DEVICES OPERATING FROM ENERGY SOURCES Jul 27, 1989 Abandoned
Array ( [id] => 2818473 [patent_doc_number] => 05148545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-15 [patent_title] => 'Bus device which performs protocol confidential transactions' [patent_app_type] => 1 [patent_app_number] => 7/384128 [patent_app_country] => US [patent_app_date] => 1989-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 63 [patent_no_of_words] => 57296 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/148/05148545.pdf [firstpage_image] =>[orig_patent_app_number] => 384128 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/384128
Bus device which performs protocol confidential transactions Jul 20, 1989 Issued
07/378967 ONE-CHIP DATA PROCESSOR WITH BUILT-IN A/D CONVERTER FOR AUTOMATICALLY REPEATING A/D CONVERSIONS WITHOUT INSTRUCTIONS FROM CPU Jul 11, 1989 Abandoned
07/376264 COMPUTING SYSTEM WITH A CACHE MEMORY AND AN ADDITIONAL LOOK-ASIDE CACHE MEMORY Jul 4, 1989 Abandoned
Array ( [id] => 2758680 [patent_doc_number] => 05021945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-04 [patent_title] => 'Parallel processor system for processing natural concurrencies and method therefor' [patent_app_type] => 1 [patent_app_number] => 7/372247 [patent_app_country] => US [patent_app_date] => 1989-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 27 [patent_no_of_words] => 21063 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/021/05021945.pdf [firstpage_image] =>[orig_patent_app_number] => 372247 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/372247
Parallel processor system for processing natural concurrencies and method therefor Jun 25, 1989 Issued
Array ( [id] => 2588442 [patent_doc_number] => 04974150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-27 [patent_title] => 'Fault tolerant digital data processor with improved input/output controller' [patent_app_type] => 1 [patent_app_number] => 7/368125 [patent_app_country] => US [patent_app_date] => 1989-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 40 [patent_no_of_words] => 21960 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 312 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/974/04974150.pdf [firstpage_image] =>[orig_patent_app_number] => 368125 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/368125
Fault tolerant digital data processor with improved input/output controller Jun 15, 1989 Issued
Array ( [id] => 2588327 [patent_doc_number] => 04974144 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-27 [patent_title] => 'Digital data processor with fault-tolerant peripheral interface' [patent_app_type] => 1 [patent_app_number] => 7/368124 [patent_app_country] => US [patent_app_date] => 1989-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 40 [patent_no_of_words] => 21995 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/974/04974144.pdf [firstpage_image] =>[orig_patent_app_number] => 368124 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/368124
Digital data processor with fault-tolerant peripheral interface Jun 15, 1989 Issued
07/368942 MICROPROCESSOR WITH IMPROVED INSTRUCTION CYCLE Jun 12, 1989 Abandoned
07/359804 INTEGRATED AND PROGRAMMABLE PROCESSOR FOR WORD-WISE DIGITAL SIGNAL PROCESSING May 30, 1989 Abandoned
07/351838 DATA PROCESSING APPARATUS WITH SCHEDULE CREATION, PRIORITIZATION, DISPLAY AND CONTROL FUNCTIONS May 14, 1989 Abandoned
07/344639 DATA PREFETCHING BASED ON STORE INFORMATION IN MULTI-PROCESSOR CACHES Apr 27, 1989 Abandoned
07/342477 COMPUTER INTERFACE BETWEEN I/O CHANNEL UNIT AND SERVICE PROCESSING UNIT Apr 23, 1989 Abandoned
Array ( [id] => 2832231 [patent_doc_number] => 05168559 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-01 [patent_title] => 'Emulation system capable of complying with microcomputers having different on-chip memory capacities' [patent_app_type] => 1 [patent_app_number] => 7/337756 [patent_app_country] => US [patent_app_date] => 1989-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4189 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/168/05168559.pdf [firstpage_image] =>[orig_patent_app_number] => 337756 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/337756
Emulation system capable of complying with microcomputers having different on-chip memory capacities Apr 12, 1989 Issued
Array ( [id] => 2772459 [patent_doc_number] => 05063494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-05 [patent_title] => 'Programmable data communications controller' [patent_app_type] => 1 [patent_app_number] => 7/336980 [patent_app_country] => US [patent_app_date] => 1989-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3636 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/063/05063494.pdf [firstpage_image] =>[orig_patent_app_number] => 336980 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/336980
Programmable data communications controller Apr 11, 1989 Issued
Array ( [id] => 2715797 [patent_doc_number] => 05014188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-07 [patent_title] => 'Cache memory controllor associated with microprocessor' [patent_app_type] => 1 [patent_app_number] => 7/337004 [patent_app_country] => US [patent_app_date] => 1989-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6928 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 392 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/014/05014188.pdf [firstpage_image] =>[orig_patent_app_number] => 337004 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/337004
Cache memory controllor associated with microprocessor Apr 11, 1989 Issued
Array ( [id] => 2775679 [patent_doc_number] => 05007018 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-09 [patent_title] => 'Vital processor implemented with non-vital hardware' [patent_app_type] => 1 [patent_app_number] => 7/335179 [patent_app_country] => US [patent_app_date] => 1989-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 30033 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/007/05007018.pdf [firstpage_image] =>[orig_patent_app_number] => 335179 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/335179
Vital processor implemented with non-vital hardware Apr 6, 1989 Issued
Array ( [id] => 2743725 [patent_doc_number] => 05051945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-24 [patent_title] => 'Special function unit with interrupt latches for programmable controller' [patent_app_type] => 1 [patent_app_number] => 7/330321 [patent_app_country] => US [patent_app_date] => 1989-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1470 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/051/05051945.pdf [firstpage_image] =>[orig_patent_app_number] => 330321 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/330321
Special function unit with interrupt latches for programmable controller Mar 28, 1989 Issued
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