Search

Eddie P. Chan

Examiner (ID: 4047)

Most Active Art Unit
2307
Art Unit(s)
2307, 2101, 2751, 2183, 2316
Total Applications
716
Issued Applications
479
Pending Applications
12
Abandoned Applications
224

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2364976 [patent_doc_number] => 04694395 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-15 [patent_title] => 'System for performing virtual look-ahead memory operations' [patent_app_type] => 1 [patent_app_number] => 6/801361 [patent_app_country] => US [patent_app_date] => 1985-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 12705 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 415 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/694/04694395.pdf [firstpage_image] =>[orig_patent_app_number] => 801361 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/801361
System for performing virtual look-ahead memory operations Nov 24, 1985 Issued
Array ( [id] => 2534709 [patent_doc_number] => 04797815 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-10 [patent_title] => 'Interleaved synchronous bus access protocol for a shared memory multi-processor system' [patent_app_type] => 1 [patent_app_number] => 6/800995 [patent_app_country] => US [patent_app_date] => 1985-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4062 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/797/04797815.pdf [firstpage_image] =>[orig_patent_app_number] => 800995 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/800995
Interleaved synchronous bus access protocol for a shared memory multi-processor system Nov 21, 1985 Issued
Array ( [id] => 2316774 [patent_doc_number] => 04638425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-20 [patent_title] => 'Peripheral data storage having access controls with error recovery' [patent_app_type] => 1 [patent_app_number] => 6/800177 [patent_app_country] => US [patent_app_date] => 1985-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 12575 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/638/04638425.pdf [firstpage_image] =>[orig_patent_app_number] => 800177 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/800177
Peripheral data storage having access controls with error recovery Nov 19, 1985 Issued
Array ( [id] => 2420098 [patent_doc_number] => 04731724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-03-15 [patent_title] => 'System for simultaneous transmission of data blocks or vectors between a memory and one or a number of data-processing units' [patent_app_type] => 1 [patent_app_number] => 6/799854 [patent_app_country] => US [patent_app_date] => 1985-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7352 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 435 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/731/04731724.pdf [firstpage_image] =>[orig_patent_app_number] => 799854 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/799854
System for simultaneous transmission of data blocks or vectors between a memory and one or a number of data-processing units Nov 19, 1985 Issued
Array ( [id] => 2329217 [patent_doc_number] => 04672186 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-09 [patent_title] => 'Digital document scanning system' [patent_app_type] => 1 [patent_app_number] => 6/798730 [patent_app_country] => US [patent_app_date] => 1985-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 80 [patent_figures_cnt] => 81 [patent_no_of_words] => 20728 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/672/04672186.pdf [firstpage_image] =>[orig_patent_app_number] => 798730 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/798730
Digital document scanning system Nov 18, 1985 Issued
Array ( [id] => 2424540 [patent_doc_number] => 04771377 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-09-13 [patent_title] => 'Microcode control apparatus' [patent_app_type] => 1 [patent_app_number] => 6/798522 [patent_app_country] => US [patent_app_date] => 1985-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4445 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/771/04771377.pdf [firstpage_image] =>[orig_patent_app_number] => 798522 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/798522
Microcode control apparatus Nov 14, 1985 Issued
Array ( [id] => 2452413 [patent_doc_number] => 04745540 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-17 [patent_title] => 'Process input/output system' [patent_app_type] => 1 [patent_app_number] => 6/797650 [patent_app_country] => US [patent_app_date] => 1985-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 3598 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/745/04745540.pdf [firstpage_image] =>[orig_patent_app_number] => 797650 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/797650
Process input/output system Nov 12, 1985 Issued
Array ( [id] => 2503056 [patent_doc_number] => 04847755 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-11 [patent_title] => 'Parallel processing method and apparatus for increasing processing throughout by parallel processing low level instructions having natural concurrencies' [patent_app_type] => 1 [patent_app_number] => 6/794221 [patent_app_country] => US [patent_app_date] => 1985-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 27 [patent_no_of_words] => 25610 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 24 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/847/04847755.pdf [firstpage_image] =>[orig_patent_app_number] => 794221 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/794221
Parallel processing method and apparatus for increasing processing throughout by parallel processing low level instructions having natural concurrencies Oct 30, 1985 Issued
Array ( [id] => 2595122 [patent_doc_number] => 04970502 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-13 [patent_title] => 'Running character display' [patent_app_type] => 1 [patent_app_number] => 6/792169 [patent_app_country] => US [patent_app_date] => 1985-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 12723 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/970/04970502.pdf [firstpage_image] =>[orig_patent_app_number] => 792169 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/792169
Running character display Oct 24, 1985 Issued
Array ( [id] => 2328434 [patent_doc_number] => 04670855 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-02 [patent_title] => 'Interchangeable interface circuit structure' [patent_app_type] => 1 [patent_app_number] => 6/788944 [patent_app_country] => US [patent_app_date] => 1985-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6539 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 408 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/670/04670855.pdf [firstpage_image] =>[orig_patent_app_number] => 788944 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/788944
Interchangeable interface circuit structure Oct 17, 1985 Issued
Array ( [id] => 2452615 [patent_doc_number] => 04750116 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-06-07 [patent_title] => 'Hardware resource management' [patent_app_type] => 1 [patent_app_number] => 6/786913 [patent_app_country] => US [patent_app_date] => 1985-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3672 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/750/04750116.pdf [firstpage_image] =>[orig_patent_app_number] => 786913 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/786913
Hardware resource management Oct 10, 1985 Issued
Array ( [id] => 2364975 [patent_doc_number] => 04694394 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-15 [patent_title] => 'Microprocessor system having a multiplexed address/data bus which communicates with a plurality of memory and input/output devices including TTL output gates' [patent_app_type] => 1 [patent_app_number] => 6/786376 [patent_app_country] => US [patent_app_date] => 1985-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1785 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/694/04694394.pdf [firstpage_image] =>[orig_patent_app_number] => 786376 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/786376
Microprocessor system having a multiplexed address/data bus which communicates with a plurality of memory and input/output devices including TTL output gates Oct 9, 1985 Issued
06/784606 DATA TERMINAL WITH CAPABILITY OF CHECKING MEMORY STORAGE CAPACITY AS WELL AS PROGRAM EXECUTION PARAMETERS Oct 3, 1985 Abandoned
06/777572 DATA SELECTION CIRCUITS, SYSTEMS AND METHODS Sep 18, 1985 Abandoned
Array ( [id] => 2494562 [patent_doc_number] => 04821182 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-04-11 [patent_title] => 'Memory address decoding system' [patent_app_type] => 1 [patent_app_number] => 6/776490 [patent_app_country] => US [patent_app_date] => 1985-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 24733 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/821/04821182.pdf [firstpage_image] =>[orig_patent_app_number] => 776490 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/776490
Memory address decoding system Sep 15, 1985 Issued
Array ( [id] => 2465345 [patent_doc_number] => 04785414 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-11-15 [patent_title] => 'Computer system with automatic range checking and conversion of data words' [patent_app_type] => 1 [patent_app_number] => 6/774593 [patent_app_country] => US [patent_app_date] => 1985-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4801 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 359 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/785/04785414.pdf [firstpage_image] =>[orig_patent_app_number] => 774593 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/774593
Computer system with automatic range checking and conversion of data words Aug 19, 1985 Issued
Array ( [id] => 2424161 [patent_doc_number] => 04748439 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-31 [patent_title] => 'Memory apparatus and method for retrieving sequences of symbols including variable elements' [patent_app_type] => 1 [patent_app_number] => 6/765387 [patent_app_country] => US [patent_app_date] => 1985-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 9456 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/748/04748439.pdf [firstpage_image] =>[orig_patent_app_number] => 765387 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/765387
Memory apparatus and method for retrieving sequences of symbols including variable elements Aug 12, 1985 Issued
06/765391 CIRCULATING CONTEXT ADDRESSABLE MEMORY Aug 12, 1985 Abandoned
Array ( [id] => 2271113 [patent_doc_number] => 04575815 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-03-11 [patent_title] => 'Data storage unit' [patent_app_type] => 1 [patent_app_number] => 6/761149 [patent_app_country] => US [patent_app_date] => 1985-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1916 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/575/04575815.pdf [firstpage_image] =>[orig_patent_app_number] => 761149 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/761149
Data storage unit Jul 31, 1985 Issued
Array ( [id] => 2396847 [patent_doc_number] => 04794521 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-12-27 [patent_title] => 'Digital computer with cache capable of concurrently handling multiple accesses from parallel processors' [patent_app_type] => 1 [patent_app_number] => 6/757859 [patent_app_country] => US [patent_app_date] => 1985-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 26743 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/794/04794521.pdf [firstpage_image] =>[orig_patent_app_number] => 757859 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/757859
Digital computer with cache capable of concurrently handling multiple accesses from parallel processors Jul 21, 1985 Issued
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