
Eddie P. Chan
Examiner (ID: 4047)
| Most Active Art Unit | 2307 |
| Art Unit(s) | 2307, 2101, 2751, 2183, 2316 |
| Total Applications | 716 |
| Issued Applications | 479 |
| Pending Applications | 12 |
| Abandoned Applications | 224 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2324534
[patent_doc_number] => 04689738
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-08-25
[patent_title] => 'Integrated and programmable processor for word-wise digital signal processing'
[patent_app_type] => 1
[patent_app_number] => 6/663730
[patent_app_country] => US
[patent_app_date] => 1984-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 9655
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 274
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/689/04689738.pdf
[firstpage_image] =>[orig_patent_app_number] => 663730
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/663730 | Integrated and programmable processor for word-wise digital signal processing | Oct 21, 1984 | Issued |
Array
(
[id] => 2328102
[patent_doc_number] => 04670835
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-02
[patent_title] => 'Distributed control store word architecture'
[patent_app_type] => 1
[patent_app_number] => 6/663096
[patent_app_country] => US
[patent_app_date] => 1984-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 10897
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 479
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/670/04670835.pdf
[firstpage_image] =>[orig_patent_app_number] => 663096
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/663096 | Distributed control store word architecture | Oct 18, 1984 | Issued |
Array
(
[id] => 2358944
[patent_doc_number] => 04654821
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-31
[patent_title] => 'Automatic restart apparatus for a processing system'
[patent_app_type] => 1
[patent_app_number] => 6/654997
[patent_app_country] => US
[patent_app_date] => 1984-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 6592
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 351
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/654/04654821.pdf
[firstpage_image] =>[orig_patent_app_number] => 654997
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/654997 | Automatic restart apparatus for a processing system | Sep 25, 1984 | Issued |
Array
(
[id] => 2336258
[patent_doc_number] => 04635195
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-01-06
[patent_title] => 'Power control network using reliable communications protocol'
[patent_app_type] => 1
[patent_app_number] => 6/654080
[patent_app_country] => US
[patent_app_date] => 1984-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7416
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 351
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/635/04635195.pdf
[firstpage_image] =>[orig_patent_app_number] => 654080
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/654080 | Power control network using reliable communications protocol | Sep 24, 1984 | Issued |
Array
(
[id] => 2194394
[patent_doc_number] => 04546450
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-10-08
[patent_title] => 'Priority determination circuit'
[patent_app_type] => 1
[patent_app_number] => 6/657457
[patent_app_country] => US
[patent_app_date] => 1984-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 5774
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 871
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/546/04546450.pdf
[firstpage_image] =>[orig_patent_app_number] => 657457
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/657457 | Priority determination circuit | Sep 19, 1984 | Issued |
Array
(
[id] => 2227672
[patent_doc_number] => 04628483
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-12-09
[patent_title] => 'One level sorting network'
[patent_app_type] => 1
[patent_app_number] => 6/652304
[patent_app_country] => US
[patent_app_date] => 1984-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 9369
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 504
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/628/04628483.pdf
[firstpage_image] =>[orig_patent_app_number] => 652304
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/652304 | One level sorting network | Sep 18, 1984 | Issued |
Array
(
[id] => 2352929
[patent_doc_number] => 04649513
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-10
[patent_title] => 'Apparatus and method for processing system printing data records on a page printer'
[patent_app_type] => 1
[patent_app_number] => 6/650402
[patent_app_country] => US
[patent_app_date] => 1984-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 22
[patent_no_of_words] => 16607
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 294
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/649/04649513.pdf
[firstpage_image] =>[orig_patent_app_number] => 650402
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/650402 | Apparatus and method for processing system printing data records on a page printer | Sep 12, 1984 | Issued |
Array
(
[id] => 2309684
[patent_doc_number] => 04691282
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-09-01
[patent_title] => '16-bit microprocessor system'
[patent_app_type] => 1
[patent_app_number] => 6/643386
[patent_app_country] => US
[patent_app_date] => 1984-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 8478
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 802
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/691/04691282.pdf
[firstpage_image] =>[orig_patent_app_number] => 643386
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/643386 | 16-bit microprocessor system | Aug 22, 1984 | Issued |
Array
(
[id] => 2182376
[patent_doc_number] => 04562533
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-12-31
[patent_title] => 'Data communications system to system adapter'
[patent_app_type] => 1
[patent_app_number] => 6/642736
[patent_app_country] => US
[patent_app_date] => 1984-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 31
[patent_no_of_words] => 11761
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 697
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/562/04562533.pdf
[firstpage_image] =>[orig_patent_app_number] => 642736
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/642736 | Data communications system to system adapter | Aug 19, 1984 | Issued |
Array
(
[id] => 2182225
[patent_doc_number] => 04547849
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-10-15
[patent_title] => 'Interface between a microprocessor and a coprocessor'
[patent_app_type] => 1
[patent_app_number] => 6/615081
[patent_app_country] => US
[patent_app_date] => 1984-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 12823
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 567
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/547/04547849.pdf
[firstpage_image] =>[orig_patent_app_number] => 615081
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/615081 | Interface between a microprocessor and a coprocessor | Aug 16, 1984 | Issued |
Array
(
[id] => 2422122
[patent_doc_number] => 04744024
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-05-10
[patent_title] => 'Method of operating a bus in a data processing system via a repetitive three stage signal sequence'
[patent_app_type] => 1
[patent_app_number] => 6/633662
[patent_app_country] => US
[patent_app_date] => 1984-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 5254
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/744/04744024.pdf
[firstpage_image] =>[orig_patent_app_number] => 633662
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/633662 | Method of operating a bus in a data processing system via a repetitive three stage signal sequence | Jul 22, 1984 | Issued |
| 06/631518 | METHOD AND APPARATUS FOR COORDINATING EXECUTION OF AN INSTRUCTION BY A COPROCESSOR | Jul 17, 1984 | Abandoned |
Array
(
[id] => 2421260
[patent_doc_number] => 04719562
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-01-12
[patent_title] => 'Multiprocessor system for intercommunication of processors'
[patent_app_type] => 1
[patent_app_number] => 6/631986
[patent_app_country] => US
[patent_app_date] => 1984-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2243
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 303
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/719/04719562.pdf
[firstpage_image] =>[orig_patent_app_number] => 631986
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/631986 | Multiprocessor system for intercommunication of processors | Jul 17, 1984 | Issued |
Array
(
[id] => 2245536
[patent_doc_number] => 04608629
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-08-26
[patent_title] => 'Multiprocessor memory system employing data transfer system'
[patent_app_type] => 1
[patent_app_number] => 6/629757
[patent_app_country] => US
[patent_app_date] => 1984-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2154
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 366
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/608/04608629.pdf
[firstpage_image] =>[orig_patent_app_number] => 629757
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/629757 | Multiprocessor memory system employing data transfer system | Jul 12, 1984 | Issued |
Array
(
[id] => 2397332
[patent_doc_number] => 04663708
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-05-05
[patent_title] => 'Synchronization mechanism for a multiprocessing system'
[patent_app_type] => 1
[patent_app_number] => 6/628176
[patent_app_country] => US
[patent_app_date] => 1984-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5978
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 304
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/663/04663708.pdf
[firstpage_image] =>[orig_patent_app_number] => 628176
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/628176 | Synchronization mechanism for a multiprocessing system | Jul 5, 1984 | Issued |
Array
(
[id] => 2224626
[patent_doc_number] => 04631662
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-12-23
[patent_title] => 'Scanning alarm electronic processor'
[patent_app_type] => 1
[patent_app_number] => 6/628093
[patent_app_country] => US
[patent_app_date] => 1984-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3044
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 328
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/631/04631662.pdf
[firstpage_image] =>[orig_patent_app_number] => 628093
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/628093 | Scanning alarm electronic processor | Jul 4, 1984 | Issued |
Array
(
[id] => 2361116
[patent_doc_number] => 04688192
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-08-18
[patent_title] => 'Electronic dictionary'
[patent_app_type] => 1
[patent_app_number] => 6/625392
[patent_app_country] => US
[patent_app_date] => 1984-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 7174
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 480
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/688/04688192.pdf
[firstpage_image] =>[orig_patent_app_number] => 625392
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/625392 | Electronic dictionary | Jun 27, 1984 | Issued |
| 06/625068 | DATA PROCESSOR HAVING MULTIPLE BUS CYCLE OPERAND CYCLES | Jun 26, 1984 | Abandoned |
| 06/625342 | CACHE DISABLE FOR A DATA PROCESSOR | Jun 25, 1984 | Abandoned |
Array
(
[id] => 2309049
[patent_doc_number] => 04644465
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-02-17
[patent_title] => 'Apparatus for controlling I/O interrupt in multiprocessor system'
[patent_app_type] => 1
[patent_app_number] => 6/623086
[patent_app_country] => US
[patent_app_date] => 1984-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2683
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 365
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/644/04644465.pdf
[firstpage_image] =>[orig_patent_app_number] => 623086
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/623086 | Apparatus for controlling I/O interrupt in multiprocessor system | Jun 20, 1984 | Issued |