| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2071036
[patent_doc_number] => 04459661
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-07-10
[patent_title] => 'Channel address control system for a virtual machine system'
[patent_app_type] => 1
[patent_app_number] => 6/370193
[patent_app_country] => US
[patent_app_date] => 1982-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 5610
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 448
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/459/04459661.pdf
[firstpage_image] =>[orig_patent_app_number] => 370193
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/370193 | Channel address control system for a virtual machine system | Apr 20, 1982 | Issued |
Array
(
[id] => 2182168
[patent_doc_number] => 04547845
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-10-15
[patent_title] => 'Split-BUS multiprocessor system'
[patent_app_type] => 1
[patent_app_number] => 6/370310
[patent_app_country] => US
[patent_app_date] => 1982-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 4079
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 510
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/547/04547845.pdf
[firstpage_image] =>[orig_patent_app_number] => 370310
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/370310 | Split-BUS multiprocessor system | Apr 20, 1982 | Issued |
| 06/365828 | MICROCOMPUTER CONTAINING EPROM WITH SELF-PROGRAM CAPABILITY | Apr 4, 1982 | Abandoned |
Array
(
[id] => 2182398
[patent_doc_number] => 04562535
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-12-31
[patent_title] => 'Self-configuring digital processor system with global system'
[patent_app_type] => 1
[patent_app_number] => 6/365813
[patent_app_country] => US
[patent_app_date] => 1982-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 22
[patent_no_of_words] => 9034
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 498
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/562/04562535.pdf
[firstpage_image] =>[orig_patent_app_number] => 365813
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/365813 | Self-configuring digital processor system with global system | Apr 4, 1982 | Issued |
Array
(
[id] => 2270790
[patent_doc_number] => 04575792
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-03-11
[patent_title] => 'Shared interface apparatus for testing the memory sections of a cache unit'
[patent_app_type] => 1
[patent_app_number] => 6/364051
[patent_app_country] => US
[patent_app_date] => 1982-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8493
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 419
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/575/04575792.pdf
[firstpage_image] =>[orig_patent_app_number] => 364051
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/364051 | Shared interface apparatus for testing the memory sections of a cache unit | Mar 30, 1982 | Issued |
Array
(
[id] => 2065601
[patent_doc_number] => 04428065
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-01-24
[patent_title] => 'Data processing system with multiple display apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/360036
[patent_app_country] => US
[patent_app_date] => 1982-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 15
[patent_no_of_words] => 13274
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 862
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/428/04428065.pdf
[firstpage_image] =>[orig_patent_app_number] => 360036
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/360036 | Data processing system with multiple display apparatus | Mar 18, 1982 | Issued |
Array
(
[id] => 2071233
[patent_doc_number] => 04459677
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-07-10
[patent_title] => 'VIQ Computer graphics system'
[patent_app_type] => 1
[patent_app_number] => 6/355691
[patent_app_country] => US
[patent_app_date] => 1982-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 14281
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/459/04459677.pdf
[firstpage_image] =>[orig_patent_app_number] => 355691
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/355691 | VIQ Computer graphics system | Mar 7, 1982 | Issued |
Array
(
[id] => 2180945
[patent_doc_number] => 04556953
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-12-03
[patent_title] => 'Interchangeable interface circuitry arrangements for use with a data processing system'
[patent_app_type] => 1
[patent_app_number] => 6/351718
[patent_app_country] => US
[patent_app_date] => 1982-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 8716
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 364
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/556/04556953.pdf
[firstpage_image] =>[orig_patent_app_number] => 351718
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/351718 | Interchangeable interface circuitry arrangements for use with a data processing system | Feb 23, 1982 | Issued |
| 06/351721 | INTERCHANGEABLE INTERFACE CIRCUIT STRUCTURE | Feb 23, 1982 | Abandoned |
Array
(
[id] => 2245602
[patent_doc_number] => 04608634
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-08-26
[patent_title] => 'Microcomputer with offset in store-accumulator operations'
[patent_app_type] => 1
[patent_app_number] => 6/350956
[patent_app_country] => US
[patent_app_date] => 1982-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 65
[patent_no_of_words] => 22246
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/608/04608634.pdf
[firstpage_image] =>[orig_patent_app_number] => 350956
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/350956 | Microcomputer with offset in store-accumulator operations | Feb 21, 1982 | Issued |
Array
(
[id] => 2222956
[patent_doc_number] => 04621317
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-11-04
[patent_title] => 'Arithmetic logic unit of a sequence controller'
[patent_app_type] => 1
[patent_app_number] => 6/350614
[patent_app_country] => US
[patent_app_date] => 1982-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 4863
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 558
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/621/04621317.pdf
[firstpage_image] =>[orig_patent_app_number] => 350614
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/350614 | Arithmetic logic unit of a sequence controller | Feb 21, 1982 | Issued |
Array
(
[id] => 2166901
[patent_doc_number] => 04500956
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-02-19
[patent_title] => 'Memory addressing system'
[patent_app_type] => 1
[patent_app_number] => 6/342069
[patent_app_country] => US
[patent_app_date] => 1982-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 21
[patent_no_of_words] => 26342
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/500/04500956.pdf
[firstpage_image] =>[orig_patent_app_number] => 342069
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/342069 | Memory addressing system | Jan 24, 1982 | Issued |
Array
(
[id] => 2072548
[patent_doc_number] => 04430728
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-02-07
[patent_title] => 'Computer terminal security system'
[patent_app_type] => 1
[patent_app_number] => 6/335972
[patent_app_country] => US
[patent_app_date] => 1981-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4135
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 687
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/430/04430728.pdf
[firstpage_image] =>[orig_patent_app_number] => 335972
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/335972 | Computer terminal security system | Dec 28, 1981 | Issued |
Array
(
[id] => 2133555
[patent_doc_number] => 04543627
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-09-24
[patent_title] => 'Internal communication arrangement for a multiprocessor system'
[patent_app_type] => 1
[patent_app_number] => 6/330171
[patent_app_country] => US
[patent_app_date] => 1981-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 5241
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 285
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/543/04543627.pdf
[firstpage_image] =>[orig_patent_app_number] => 330171
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/330171 | Internal communication arrangement for a multiprocessor system | Dec 13, 1981 | Issued |
Array
(
[id] => 2098735
[patent_doc_number] => 04456970
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-06-26
[patent_title] => 'Interrupt system for peripheral controller'
[patent_app_type] => 1
[patent_app_number] => 6/329422
[patent_app_country] => US
[patent_app_date] => 1981-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 24835
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 477
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/456/04456970.pdf
[firstpage_image] =>[orig_patent_app_number] => 329422
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/329422 | Interrupt system for peripheral controller | Dec 9, 1981 | Issued |
| 06/328935 | DATA PROCESSING SYSTEM HAVING A DATA BASE MANAGEMENT SYSTEM | Dec 8, 1981 | Abandoned |
| 06/328973 | INTERFACE BETWEEN A MICROPROCESSOR AND A COPROCESSOR | Dec 8, 1981 | Abandoned |
| 06/327283 | DATA COMMUNICATIONS SYSTEM TO SYSTEM ADAPTER | Dec 2, 1981 | Abandoned |
| 06/325288 | CONTROL OF CACHE BUFFER FOR MEMORY SUBSYSTEM | Nov 26, 1981 | Abandoned |
| 06/324183 | GLOBAL OPERATION COORDINATION METHOD AND CIRCUIT | Nov 22, 1981 | Abandoned |