Eddie P. Chan

Array ( [id] => 2218863 [patent_doc_number] => 04616331 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-10-07 [patent_title] => 'Information processing system consisting of an arithmetic control unit formed into a one-chip typed by application of a highly-integrated semiconductor device' [patent_app_type] => 1 [patent_app_number] => 6/236116 [patent_app_country] => US [patent_app_date] => 1981-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 10927 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/616/04616331.pdf [firstpage_image] =>[orig_patent_app_number] => 236116 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2025909 [patent_doc_number] => 04395756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-07-26 [patent_title] => 'Processor implemented communications interface having external clock actuated disabling control' [patent_app_type] => 1 [patent_app_number] => 6/235242 [patent_app_country] => US [patent_app_date] => 1981-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5280 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 365 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/395/04395756.pdf [firstpage_image] =>[orig_patent_app_number] => 235242 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2113050 [patent_doc_number] => 04467410 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-08-21 [patent_title] => 'Multi-phase subroutine control circuitry' [patent_app_type] => 1 [patent_app_number] => 6/231554 [patent_app_country] => US [patent_app_date] => 1981-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5519 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/467/04467410.pdf [firstpage_image] =>[orig_patent_app_number] => 231554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2063461 [patent_doc_number] => 04433376 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-02-21 [patent_title] => 'Intersystem translation logic system' [patent_app_type] => 1 [patent_app_number] => 6/216600 [patent_app_country] => US [patent_app_date] => 1980-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 73 [patent_figures_cnt] => 42 [patent_no_of_words] => 65114 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 745 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/433/04433376.pdf [firstpage_image] =>[orig_patent_app_number] => 216600 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2049352 [patent_doc_number] => 04379328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-04-05 [patent_title] => 'Linear sequencing microprocessor facilitating' [patent_app_type] => 1 [patent_app_number] => 6/216681 [patent_app_country] => US [patent_app_date] => 1980-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 20089 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 976 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/379/04379328.pdf [firstpage_image] =>[orig_patent_app_number] => 216681 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1999968 [patent_doc_number] => 04374416 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-02-15 [patent_title] => 'Linear sequencing microprocessor having word and byte handling' [patent_app_type] => 1 [patent_app_number] => 6/216761 [patent_app_country] => US [patent_app_date] => 1980-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 24 [patent_no_of_words] => 20374 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 958 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/374/04374416.pdf [firstpage_image] =>[orig_patent_app_number] => 216761 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2011463 [patent_doc_number] => 04422158 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-12-20 [patent_title] => 'Method and means for interrogating a layered data base' [patent_app_type] => 1 [patent_app_number] => 6/210961 [patent_app_country] => US [patent_app_date] => 1980-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 42 [patent_no_of_words] => 73082 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 461 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/422/04422158.pdf [firstpage_image] =>[orig_patent_app_number] => 210961 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2008050 [patent_doc_number] => 04402044 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-08-30 [patent_title] => 'Microprocessor with strip layout of busses, ALU and registers' [patent_app_type] => 1 [patent_app_number] => 6/210109 [patent_app_country] => US [patent_app_date] => 1980-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 28 [patent_no_of_words] => 30815 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 486 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/402/04402044.pdf [firstpage_image] =>[orig_patent_app_number] => 210109 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1997708 [patent_doc_number] => 04381552 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-04-26 [patent_title] => 'Stanby mode controller utilizing microprocessor' [patent_app_type] => 1 [patent_app_number] => 6/208101 [patent_app_country] => US [patent_app_date] => 1980-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2269 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/381/04381552.pdf [firstpage_image] =>[orig_patent_app_number] => 208101 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2115493 [patent_doc_number] => 04451880 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-05-29 [patent_title] => 'Memory controller with interleaved queuing apparatus' [patent_app_type] => 1 [patent_app_number] => 6/202821 [patent_app_country] => US [patent_app_date] => 1980-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 13 [patent_no_of_words] => 19142 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/451/04451880.pdf [firstpage_image] =>[orig_patent_app_number] => 202821 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2057875 [patent_doc_number] => 04394730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-07-19 [patent_title] => 'Multi-processor system employing job-swapping between different priority processors' [patent_app_type] => 1 [patent_app_number] => 6/197566 [patent_app_country] => US [patent_app_date] => 1980-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1776 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 335 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/394/04394730.pdf [firstpage_image] =>[orig_patent_app_number] => 197566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2061221 [patent_doc_number] => 04393461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-07-12 [patent_title] => 'Communications subsystem having a self-latching data monitor and storage device' [patent_app_type] => 1 [patent_app_number] => 6/194311 [patent_app_country] => US [patent_app_date] => 1980-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 4 [patent_no_of_words] => 4438 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/393/04393461.pdf [firstpage_image] =>[orig_patent_app_number] => 194311 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2132445 [patent_doc_number] => 04432049 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-02-14 [patent_title] => 'Programmable mode select by reset' [patent_app_type] => 1 [patent_app_number] => 6/192157 [patent_app_country] => US [patent_app_date] => 1980-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4710 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/432/04432049.pdf [firstpage_image] =>[orig_patent_app_number] => 192157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2009685 [patent_doc_number] => 04398265 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-08-09 [patent_title] => 'Keyboard and display interface adapter architecture' [patent_app_type] => 1 [patent_app_number] => 6/187305 [patent_app_country] => US [patent_app_date] => 1980-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6890 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/398/04398265.pdf [firstpage_image] =>[orig_patent_app_number] => 187305 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2012156 [patent_doc_number] => 04392207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-07-05 [patent_title] => 'Card reader-data link processor' [patent_app_type] => 1 [patent_app_number] => 6/185430 [patent_app_country] => US [patent_app_date] => 1980-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 28842 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 672 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/392/04392207.pdf [firstpage_image] =>[orig_patent_app_number] => 185430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2055426 [patent_doc_number] => 04390964 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-06-28 [patent_title] => 'Input/output subsystem using card reader-peripheral controller' [patent_app_type] => 1 [patent_app_number] => 6/185422 [patent_app_country] => US [patent_app_date] => 1980-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 28572 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 752 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/390/04390964.pdf [firstpage_image] =>[orig_patent_app_number] => 185422 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1975737 [patent_doc_number] => 04354231 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-10-12 [patent_title] => 'Apparatus for reducing the instruction execution time in a computer employing indirect addressing of a data memory' [patent_app_type] => 1 [patent_app_number] => 6/183260 [patent_app_country] => US [patent_app_date] => 1980-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2544 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/354/04354231.pdf [firstpage_image] =>[orig_patent_app_number] => 183260 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2532864 [patent_doc_number] => 04873662 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-10-10 [patent_title] => 'Information handling system and terminal apparatus therefor' [patent_app_type] => 1 [patent_app_number] => 6/178307 [patent_app_country] => US [patent_app_date] => 1980-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2609 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/873/04873662.pdf [firstpage_image] =>[orig_patent_app_number] => 178307 [rel_patent_id] =>[rel_patent_doc_number] =>)