
Eddie P. Chan
Examiner (ID: 4047)
| Most Active Art Unit | 2307 |
| Art Unit(s) | 2307, 2101, 2751, 2183, 2316 |
| Total Applications | 716 |
| Issued Applications | 479 |
| Pending Applications | 12 |
| Abandoned Applications | 224 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2113422
[patent_doc_number] => 04467444
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-08-21
[patent_title] => 'Processor unit for microcomputer systems'
[patent_app_type] => 1
[patent_app_number] => 6/174490
[patent_app_country] => US
[patent_app_date] => 1980-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 15809
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/467/04467444.pdf
[firstpage_image] =>[orig_patent_app_number] => 174490
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/174490 | Processor unit for microcomputer systems | Jul 31, 1980 | Issued |
Array
(
[id] => 2043243
[patent_doc_number] => 04386401
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-05-31
[patent_title] => 'High speed processing restarting apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/172619
[patent_app_country] => US
[patent_app_date] => 1980-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 5126
[patent_no_of_claims] => 6
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[patent_words_short_claim] => 193
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[pdf_file] => patents/04/386/04386401.pdf
[firstpage_image] =>[orig_patent_app_number] => 172619
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/172619 | High speed processing restarting apparatus | Jul 27, 1980 | Issued |
Array
(
[id] => 2061206
[patent_doc_number] => 04393459
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-07-12
[patent_title] => 'Status reporting with ancillary data'
[patent_app_type] => 1
[patent_app_number] => 6/169544
[patent_app_country] => US
[patent_app_date] => 1980-07-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 7114
[patent_no_of_claims] => 1
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[pdf_file] => patents/04/393/04393459.pdf
[firstpage_image] =>[orig_patent_app_number] => 169544
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/169544 | Status reporting with ancillary data | Jul 16, 1980 | Issued |
Array
(
[id] => 2034909
[patent_doc_number] => 04396980
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-08-02
[patent_title] => 'Combined integrated injection logic and transistor-transistor logic microprocessor integrated circuit design'
[patent_app_type] => 1
[patent_app_number] => 6/167614
[patent_app_country] => US
[patent_app_date] => 1980-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 23
[patent_no_of_words] => 13585
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/396/04396980.pdf
[firstpage_image] =>[orig_patent_app_number] => 167614
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/167614 | Combined integrated injection logic and transistor-transistor logic microprocessor integrated circuit design | Jul 10, 1980 | Issued |
Array
(
[id] => 1977890
[patent_doc_number] => 04348740
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-09-07
[patent_title] => 'Method and portable apparatus for comparison of stored sets of data'
[patent_app_type] => 1
[patent_app_number] => 6/159206
[patent_app_country] => US
[patent_app_date] => 1980-06-13
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[pdf_file] => patents/04/348/04348740.pdf
[firstpage_image] =>[orig_patent_app_number] => 159206
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/159206 | Method and portable apparatus for comparison of stored sets of data | Jun 12, 1980 | Issued |
Array
(
[id] => 2048931
[patent_doc_number] => 04387425
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-06-07
[patent_title] => 'Masterless and contentionless computer network'
[patent_app_type] => 1
[patent_app_number] => 6/150713
[patent_app_country] => US
[patent_app_date] => 1980-05-19
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[patent_no_of_words] => 9310
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[pdf_file] => patents/04/387/04387425.pdf
[firstpage_image] =>[orig_patent_app_number] => 150713
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/150713 | Masterless and contentionless computer network | May 18, 1980 | Issued |
Array
(
[id] => 1975732
[patent_doc_number] => 04354230
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-10-12
[patent_title] => 'Synchronized, fail-operational, fail-safe multi-computer control system'
[patent_app_type] => 1
[patent_app_number] => 6/151489
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[pdf_file] => patents/04/354/04354230.pdf
[firstpage_image] =>[orig_patent_app_number] => 151489
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/151489 | Synchronized, fail-operational, fail-safe multi-computer control system | May 18, 1980 | Issued |
Array
(
[id] => 2008863
[patent_doc_number] => 04412280
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-10-25
[patent_title] => 'Complementary commands in fail-operational, fail-safe multi-computer control system'
[patent_app_type] => 1
[patent_app_number] => 6/151488
[patent_app_country] => US
[patent_app_date] => 1980-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 21
[patent_no_of_words] => 17768
[patent_no_of_claims] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/412/04412280.pdf
[firstpage_image] =>[orig_patent_app_number] => 151488
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/151488 | Complementary commands in fail-operational, fail-safe multi-computer control system | May 18, 1980 | Issued |
Array
(
[id] => 2028863
[patent_doc_number] => 04378588
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-03-29
[patent_title] => 'Buffer control for a data path system'
[patent_app_type] => 1
[patent_app_number] => 6/147091
[patent_app_country] => US
[patent_app_date] => 1980-05-06
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[pdf_file] => patents/04/378/04378588.pdf
[firstpage_image] =>[orig_patent_app_number] => 147091
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/147091 | Buffer control for a data path system | May 5, 1980 | Issued |
Array
(
[id] => 2297425
[patent_doc_number] => 04639864
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-01-27
[patent_title] => 'Power interlock system and method for use with multiprocessor systems'
[patent_app_type] => 1
[patent_app_number] => 6/147135
[patent_app_country] => US
[patent_app_date] => 1980-05-06
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[pdf_file] => patents/04/639/04639864.pdf
[firstpage_image] =>[orig_patent_app_number] => 147135
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/147135 | Power interlock system and method for use with multiprocessor systems | May 5, 1980 | Issued |
Array
(
[id] => 1939826
[patent_doc_number] => 04322815
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-03-30
[patent_title] => 'Hierarchical data storage system'
[patent_app_type] => 1
[patent_app_number] => 6/141784
[patent_app_country] => US
[patent_app_date] => 1980-04-21
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[pdf_file] => patents/04/322/04322815.pdf
[firstpage_image] =>[orig_patent_app_number] => 141784
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/141784 | Hierarchical data storage system | Apr 20, 1980 | Issued |
Array
(
[id] => 1958269
[patent_doc_number] => 04333089
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1982-06-01
[patent_title] => 'Keyboard and control system'
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[pdf_file] => patents/04/333/04333089.pdf
[firstpage_image] =>[orig_patent_app_number] => 141295
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/141295 | Keyboard and control system | Apr 17, 1980 | Issued |
Array
(
[id] => 1934995
[patent_doc_number] => 04338599
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[patent_issue_date] => 1982-07-06
[patent_title] => 'Apparatus for alpha-numeric/graphic display'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/141293 | Apparatus for alpha-numeric/graphic display | Apr 17, 1980 | Issued |
Array
(
[id] => 2009404
[patent_doc_number] => 04408302
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[patent_issue_date] => 1983-10-04
[patent_title] => 'Word processor with display device'
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[firstpage_image] =>[orig_patent_app_number] => 139115
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/139115 | Word processor with display device | Apr 9, 1980 | Issued |
Array
(
[id] => 1977800
[patent_doc_number] => 04348722
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[patent_issue_date] => 1982-09-07
[patent_title] => 'Bus error recognition for microprogrammed data processor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/136845 | Bus error recognition for microprogrammed data processor | Apr 2, 1980 | Issued |
Array
(
[id] => 1941678
[patent_doc_number] => 04327410
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[patent_title] => 'Processor auto-recovery system'
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[firstpage_image] =>[orig_patent_app_number] => 134246
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/134246 | Processor auto-recovery system | Mar 25, 1980 | Issued |
Array
(
[id] => 1953851
[patent_doc_number] => 04355355
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[patent_kind] => NA
[patent_issue_date] => 1982-10-19
[patent_title] => 'Address generating mechanism for multiple virtual spaces'
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[patent_app_number] => 6/131570
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[pdf_file] => patents/04/355/04355355.pdf
[firstpage_image] =>[orig_patent_app_number] => 131570
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/131570 | Address generating mechanism for multiple virtual spaces | Mar 18, 1980 | Issued |
Array
(
[id] => 1941115
[patent_doc_number] => 04335426
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[patent_issue_date] => 1982-06-15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/129004 | Remote processor initialization in a multi-station peer-to-peer intercommunication system | Mar 9, 1980 | Issued |
Array
(
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Array
(
[id] => 1937204
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[firstpage_image] =>[orig_patent_app_number] => 126313
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/126313 | Instruction fetch circuitry for computers | Mar 2, 1980 | Issued |