Search

Eddie P. Chan

Examiner (ID: 4047)

Most Active Art Unit
2307
Art Unit(s)
2307, 2101, 2751, 2183, 2316
Total Applications
716
Issued Applications
479
Pending Applications
12
Abandoned Applications
224

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1996636 [patent_doc_number] => 04345245 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-08-17 [patent_title] => 'Method and apparatus for arranging segmented character groups in a digital typesetter' [patent_app_type] => 1 [patent_app_number] => 6/097276 [patent_app_country] => US [patent_app_date] => 1979-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 25335 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/345/04345245.pdf [firstpage_image] =>[orig_patent_app_number] => 097276 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/097276
Method and apparatus for arranging segmented character groups in a digital typesetter Nov 25, 1979 Issued
Array ( [id] => 1975719 [patent_doc_number] => 04354227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-10-12 [patent_title] => 'Fixed resource allocation method and apparatus for multiprocessor systems having complementarily phased cycles' [patent_app_type] => 1 [patent_app_number] => 6/095840 [patent_app_country] => US [patent_app_date] => 1979-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5058 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 492 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/354/04354227.pdf [firstpage_image] =>[orig_patent_app_number] => 095840 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/095840
Fixed resource allocation method and apparatus for multiprocessor systems having complementarily phased cycles Nov 18, 1979 Issued
Array ( [id] => 1975719 [patent_doc_number] => 04354227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-10-12 [patent_title] => 'Fixed resource allocation method and apparatus for multiprocessor systems having complementarily phased cycles' [patent_app_type] => 1 [patent_app_number] => 6/095840 [patent_app_country] => US [patent_app_date] => 1979-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5058 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 492 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/354/04354227.pdf [firstpage_image] =>[orig_patent_app_number] => 095840 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/095840
Fixed resource allocation method and apparatus for multiprocessor systems having complementarily phased cycles Nov 18, 1979 Issued
Array ( [id] => 1975719 [patent_doc_number] => 04354227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-10-12 [patent_title] => 'Fixed resource allocation method and apparatus for multiprocessor systems having complementarily phased cycles' [patent_app_type] => 1 [patent_app_number] => 6/095840 [patent_app_country] => US [patent_app_date] => 1979-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5058 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 492 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/354/04354227.pdf [firstpage_image] =>[orig_patent_app_number] => 095840 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/095840
Fixed resource allocation method and apparatus for multiprocessor systems having complementarily phased cycles Nov 18, 1979 Issued
Array ( [id] => 1975719 [patent_doc_number] => 04354227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-10-12 [patent_title] => 'Fixed resource allocation method and apparatus for multiprocessor systems having complementarily phased cycles' [patent_app_type] => 1 [patent_app_number] => 6/095840 [patent_app_country] => US [patent_app_date] => 1979-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5058 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 492 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/354/04354227.pdf [firstpage_image] =>[orig_patent_app_number] => 095840 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/095840
Fixed resource allocation method and apparatus for multiprocessor systems having complementarily phased cycles Nov 18, 1979 Issued
Array ( [id] => 1907083 [patent_doc_number] => 04302809 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-11-24 [patent_title] => 'External data store memory device' [patent_app_type] => 1 [patent_app_number] => 6/094700 [patent_app_country] => US [patent_app_date] => 1979-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5219 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/302/04302809.pdf [firstpage_image] =>[orig_patent_app_number] => 094700 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/094700
External data store memory device Nov 15, 1979 Issued
Array ( [id] => 1879057 [patent_doc_number] => 04305136 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-12-08 [patent_title] => 'Method of symptom compression' [patent_app_type] => 1 [patent_app_number] => 6/094158 [patent_app_country] => US [patent_app_date] => 1979-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 8969 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/305/04305136.pdf [firstpage_image] =>[orig_patent_app_number] => 094158 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/094158
Method of symptom compression Nov 13, 1979 Issued
Array ( [id] => 2021024 [patent_doc_number] => 04371924 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1983-02-01 [patent_title] => 'Computer system apparatus for prefetching data requested by a peripheral device from memory' [patent_app_type] => 1 [patent_app_number] => 6/092872 [patent_app_country] => US [patent_app_date] => 1979-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5741 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/371/04371924.pdf [firstpage_image] =>[orig_patent_app_number] => 092872 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/092872
Computer system apparatus for prefetching data requested by a peripheral device from memory Nov 8, 1979 Issued
Array ( [id] => 1954364 [patent_doc_number] => 04310895 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-01-12 [patent_title] => 'Plural null digital interconnections' [patent_app_type] => 1 [patent_app_number] => 6/090805 [patent_app_country] => US [patent_app_date] => 1979-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 12833 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/310/04310895.pdf [firstpage_image] =>[orig_patent_app_number] => 090805 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/090805
Plural null digital interconnections Nov 1, 1979 Issued
Array ( [id] => 1975711 [patent_doc_number] => 04354225 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-10-12 [patent_title] => 'Intelligent main store for data processing systems' [patent_app_type] => 1 [patent_app_number] => 6/083648 [patent_app_country] => US [patent_app_date] => 1979-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 32580 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 335 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/354/04354225.pdf [firstpage_image] =>[orig_patent_app_number] => 083648 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/083648
Intelligent main store for data processing systems Oct 10, 1979 Issued
Array ( [id] => 1951649 [patent_doc_number] => 04321669 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-23 [patent_title] => 'Microcomputer network having several microcomputer modules which are coupled onto at least one system bus' [patent_app_type] => 1 [patent_app_number] => 6/083468 [patent_app_country] => US [patent_app_date] => 1979-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5507 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 677 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/321/04321669.pdf [firstpage_image] =>[orig_patent_app_number] => 083468 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/083468
Microcomputer network having several microcomputer modules which are coupled onto at least one system bus Oct 9, 1979 Issued
Array ( [id] => 1999424 [patent_doc_number] => 04323964 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-04-06 [patent_title] => 'CPU Employing micro programmable control for use in a data processing system' [patent_app_type] => 1 [patent_app_number] => 6/083048 [patent_app_country] => US [patent_app_date] => 1979-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 14852 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/323/04323964.pdf [firstpage_image] =>[orig_patent_app_number] => 083048 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/083048
CPU Employing micro programmable control for use in a data processing system Oct 8, 1979 Issued
Array ( [id] => 1951747 [patent_doc_number] => 04321687 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-23 [patent_title] => 'Timing pulse generation' [patent_app_type] => 1 [patent_app_number] => 6/080873 [patent_app_country] => US [patent_app_date] => 1979-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3673 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/321/04321687.pdf [firstpage_image] =>[orig_patent_app_number] => 080873 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/080873
Timing pulse generation Sep 30, 1979 Issued
Array ( [id] => 1965550 [patent_doc_number] => 04315310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-02-09 [patent_title] => 'Input/output data processing system' [patent_app_type] => 1 [patent_app_number] => 6/079991 [patent_app_country] => US [patent_app_date] => 1979-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 25883 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 602 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/315/04315310.pdf [firstpage_image] =>[orig_patent_app_number] => 079991 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/079991
Input/output data processing system Sep 27, 1979 Issued
Array ( [id] => 1996091 [patent_doc_number] => 04318174 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-03-02 [patent_title] => 'Multi-processor system employing job-swapping between different priority processors' [patent_app_type] => 1 [patent_app_number] => 6/076844 [patent_app_country] => US [patent_app_date] => 1979-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1720 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/318/04318174.pdf [firstpage_image] =>[orig_patent_app_number] => 076844 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/076844
Multi-processor system employing job-swapping between different priority processors Sep 18, 1979 Issued
Array ( [id] => 1960354 [patent_doc_number] => 04339805 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-07-13 [patent_title] => 'Information recording system' [patent_app_type] => 1 [patent_app_number] => 6/074893 [patent_app_country] => US [patent_app_date] => 1979-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6197 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 504 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/339/04339805.pdf [firstpage_image] =>[orig_patent_app_number] => 074893 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/074893
Information recording system Sep 11, 1979 Issued
Array ( [id] => 1928986 [patent_doc_number] => 04287562 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-09-01 [patent_title] => 'Real time adapter unit for use in a data processing system' [patent_app_type] => 1 [patent_app_number] => 6/073058 [patent_app_country] => US [patent_app_date] => 1979-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 7 [patent_no_of_words] => 13250 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 473 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/287/04287562.pdf [firstpage_image] =>[orig_patent_app_number] => 073058 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/073058
Real time adapter unit for use in a data processing system Sep 5, 1979 Issued
Array ( [id] => 1976706 [patent_doc_number] => 04365312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-12-21 [patent_title] => 'Sequence controller' [patent_app_type] => 1 [patent_app_number] => 6/071415 [patent_app_country] => US [patent_app_date] => 1979-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10713 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 465 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/365/04365312.pdf [firstpage_image] =>[orig_patent_app_number] => 071415 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/071415
Sequence controller Aug 29, 1979 Issued
Array ( [id] => 1886221 [patent_doc_number] => 04297691 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1981-10-27 [patent_title] => 'Figure displaying device' [patent_app_type] => 1 [patent_app_number] => 6/070821 [patent_app_country] => US [patent_app_date] => 1979-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 6332 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/297/04297691.pdf [firstpage_image] =>[orig_patent_app_number] => 070821 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/070821
Figure displaying device Aug 28, 1979 Issued
Array ( [id] => 1945385 [patent_doc_number] => 04309755 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1982-01-05 [patent_title] => 'Computer input/output arrangement for enabling a simultaneous read/write data transfer' [patent_app_type] => 1 [patent_app_number] => 6/068643 [patent_app_country] => US [patent_app_date] => 1979-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4516 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 338 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/309/04309755.pdf [firstpage_image] =>[orig_patent_app_number] => 068643 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/068643
Computer input/output arrangement for enabling a simultaneous read/write data transfer Aug 21, 1979 Issued
Menu