Edgar X. Guerra-erazo

Array ( [id] => 16965983 [patent_doc_number] => 20210217482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => POWER REGULATION FOR MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/740275 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15936099 [patent_doc_number] => 20200159683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => APPARATUSES FOR INDEPENDENT TUNING OF ON-DIE TERMINATION IMPEDANCES AND OUTPUT DRIVER IMPEDANCES, AND RELATED METHODS, SEMICONDUCTOR DEVICES, AND SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/737182 [patent_app_country] => US [patent_app_date] => 2020-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8197 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16737182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15873697 [patent_doc_number] => 20200144252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/737472 [patent_app_country] => US [patent_app_date] => 2020-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11308 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16737472 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16845739 [patent_doc_number] => 11017832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Multi-level storage in ferroelectric memory [patent_app_type] => utility [patent_app_number] => 16/732018 [patent_app_country] => US [patent_app_date] => 2019-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 22631 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16732018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16119193 [patent_doc_number] => 20200211619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => MEMORY CONTROLLER FOR STROBE-BASED MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/726048 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16920144 [patent_doc_number] => 20210193236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => POWER-ON-RESET FOR MEMORY [patent_app_type] => utility [patent_app_number] => 16/722132 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16722132 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16402065 [patent_doc_number] => 20200342923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => MEMORY SYSTEMS HAVING A PLURALITY OF MEMORY DEVICES AND METHODS OF TRAINING THE MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/722521 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36566 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16722521 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15775219 [patent_doc_number] => 20200118627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => Memory Cells, Memory Cell Arrays, Methods of Using and Methods of Making [patent_app_type] => utility [patent_app_number] => 16/707025 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16880923 [patent_doc_number] => 11031079 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-08 [patent_title] => Dynamic digital perceptron [patent_app_type] => utility [patent_app_number] => 16/698125 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4672 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698125 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16536268 [patent_doc_number] => 10878881 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-29 [patent_title] => Memory apparatus and refresh method thereof [patent_app_type] => utility [patent_app_number] => 16/697063 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2135 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16697063 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15656373 [patent_doc_number] => 20200090717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => CONTROLLER AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/694209 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16694209 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16858119 [patent_doc_number] => 20210158864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => BITCELL SUPPORTING BIT-WRITE-MASK FUNCTION [patent_app_type] => utility [patent_app_number] => 16/693677 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693677 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17380897 [patent_doc_number] => 11238918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Memory device having low write error rate [patent_app_type] => utility [patent_app_number] => 16/691127 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8925 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691127 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16706136 [patent_doc_number] => 10956067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Memory controller and flash memory system having the same [patent_app_type] => utility [patent_app_number] => 16/687189 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 5331 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16687189 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15624913 [patent_doc_number] => 20200082861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => SPIN CURRENT ASSISTED MAGNETORESISTANCE EFFECT DEVICE [patent_app_type] => utility [patent_app_number] => 16/684633 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684633 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18047723 [patent_doc_number] => 11521681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Component having optically active materials [patent_app_type] => utility [patent_app_number] => 17/290335 [patent_app_country] => US [patent_app_date] => 2019-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7293 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17290335 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15759885 [patent_doc_number] => 10622069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Semiconductor device having electrically floating body transistor, semiconductor device having both volatile and non-volatile functionality and method of operating [patent_app_type] => utility [patent_app_number] => 16/653435 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 391 [patent_figures_cnt] => 583 [patent_no_of_words] => 128540 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16653435 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17047817 [patent_doc_number] => 11101007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Semiconductor device and method of operating semiconductor device [patent_app_type] => utility [patent_app_number] => 16/593791 [patent_app_country] => US [patent_app_date] => 2019-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 8168 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16593791 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15439763 [patent_doc_number] => 20200034065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/591974 [patent_app_country] => US [patent_app_date] => 2019-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7610 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16591974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15856845 [patent_doc_number] => 10643717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Methods for detecting and mitigating memory media degradation and memory devices employing the same [patent_app_type] => utility [patent_app_number] => 16/591414 [patent_app_country] => US [patent_app_date] => 2019-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5262 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16591414 [rel_patent_id] =>[rel_patent_doc_number] =>)