
Edgar X. Guerra-erazo
Examiner (ID: 13854, Phone: (571)270-3708 , Office: P/2659 )
| Most Active Art Unit | 2659 |
| Art Unit(s) | 2626, 2659, 2656, 3649 |
| Total Applications | 951 |
| Issued Applications | 795 |
| Pending Applications | 53 |
| Abandoned Applications | 130 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13282873
[patent_doc_number] => 10153027
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-12-11
[patent_title] => Memory arrays, and methods of forming memory arrays
[patent_app_type] => utility
[patent_app_number] => 16/106617
[patent_app_country] => US
[patent_app_date] => 2018-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 29
[patent_no_of_words] => 6780
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 325
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16106617
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/106617 | Memory arrays, and methods of forming memory arrays | Aug 20, 2018 | Issued |
Array
(
[id] => 14919909
[patent_doc_number] => 10431281
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-10-01
[patent_title] => Access schemes for section-based data protection in a memory device
[patent_app_type] => utility
[patent_app_number] => 16/104711
[patent_app_country] => US
[patent_app_date] => 2018-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 39691
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16104711
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/104711 | Access schemes for section-based data protection in a memory device | Aug 16, 2018 | Issued |
Array
(
[id] => 14984567
[patent_doc_number] => 10446203
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-10-15
[patent_title] => Write cycle execution based on data comparison
[patent_app_type] => utility
[patent_app_number] => 16/103237
[patent_app_country] => US
[patent_app_date] => 2018-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7166
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103237
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/103237 | Write cycle execution based on data comparison | Aug 13, 2018 | Issued |
Array
(
[id] => 13995187
[patent_doc_number] => 20190066751
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-28
[patent_title] => Memory Cells and Arrays of Memory Cells
[patent_app_type] => utility
[patent_app_number] => 16/050141
[patent_app_country] => US
[patent_app_date] => 2018-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6096
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -32
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16050141
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/050141 | Memory cells and arrays of memory cells | Jul 30, 2018 | Issued |
Array
(
[id] => 14706627
[patent_doc_number] => 10381071
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-08-13
[patent_title] => Multi-bit computing circuit for computing-in-memory applications and computing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/049799
[patent_app_country] => US
[patent_app_date] => 2018-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5919
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16049799
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/049799 | Multi-bit computing circuit for computing-in-memory applications and computing method thereof | Jul 29, 2018 | Issued |
Array
(
[id] => 14163523
[patent_doc_number] => 20190108864
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-11
[patent_title] => APPARATUSES AND METHODS FOR PARALLEL I/O OPERATIONS IN A MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/045468
[patent_app_country] => US
[patent_app_date] => 2018-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8964
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16045468
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/045468 | Apparatuses and methods for parallel I/O operations in a memory | Jul 24, 2018 | Issued |
Array
(
[id] => 13921567
[patent_doc_number] => 10204908
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-12
[patent_title] => Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
[patent_app_type] => utility
[patent_app_number] => 16/045630
[patent_app_country] => US
[patent_app_date] => 2018-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 115
[patent_figures_cnt] => 140
[patent_no_of_words] => 30174
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16045630
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/045630 | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making | Jul 24, 2018 | Issued |
Array
(
[id] => 13667455
[patent_doc_number] => 10163907
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-25
[patent_title] => Method of maintaining the state of semiconductor memory having electrically floating body transistor
[patent_app_type] => utility
[patent_app_number] => 16/017692
[patent_app_country] => US
[patent_app_date] => 2018-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 51
[patent_figures_cnt] => 69
[patent_no_of_words] => 17753
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017692
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/017692 | Method of maintaining the state of semiconductor memory having electrically floating body transistor | Jun 24, 2018 | Issued |
Array
(
[id] => 13499297
[patent_doc_number] => 20180301191
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-10-18
[patent_title] => Semiconductor Device Having Electrically Floating Body Transistor, Semiconductor Device Having Both Volatile and Non-Volatile Functionality and Method of Operating
[patent_app_type] => utility
[patent_app_number] => 16/003350
[patent_app_country] => US
[patent_app_date] => 2018-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 128413
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16003350
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/003350 | Semiconductor device having electrically floating body transistor, semiconductor device having both volatile and non-volatile functionality and method of operating | Jun 7, 2018 | Issued |
Array
(
[id] => 13270763
[patent_doc_number] => 10147468
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-04
[patent_title] => Accessing data in memory
[patent_app_type] => utility
[patent_app_number] => 16/004122
[patent_app_country] => US
[patent_app_date] => 2018-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 8620
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16004122
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/004122 | Accessing data in memory | Jun 7, 2018 | Issued |
Array
(
[id] => 13291813
[patent_doc_number] => 10157098
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-18
[patent_title] => Flash memory apparatus and storage management method for flash memory
[patent_app_type] => utility
[patent_app_number] => 15/997674
[patent_app_country] => US
[patent_app_date] => 2018-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 16737
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15997674
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/997674 | Flash memory apparatus and storage management method for flash memory | Jun 3, 2018 | Issued |
Array
(
[id] => 15718475
[patent_doc_number] => 20200106005
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-02
[patent_title] => MAGNETORESISTIVE DYNAMIC RANDOM ACCESS MEMORY CELL
[patent_app_type] => utility
[patent_app_number] => 16/617199
[patent_app_country] => US
[patent_app_date] => 2018-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3508
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16617199
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/617199 | MAGNETORESISTIVE DYNAMIC RANDOM ACCESS MEMORY CELL | May 28, 2018 | Abandoned |
Array
(
[id] => 16417628
[patent_doc_number] => 10825528
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-03
[patent_title] => Memory devices having source lines directly coupled to body regions and methods
[patent_app_type] => utility
[patent_app_number] => 15/985973
[patent_app_country] => US
[patent_app_date] => 2018-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 2836
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15985973
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/985973 | Memory devices having source lines directly coupled to body regions and methods | May 21, 2018 | Issued |
Array
(
[id] => 14557765
[patent_doc_number] => 10347350
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-07-09
[patent_title] => Dynamic fuse sensing and latch circuit
[patent_app_type] => utility
[patent_app_number] => 15/984666
[patent_app_country] => US
[patent_app_date] => 2018-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7198
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15984666
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/984666 | Dynamic fuse sensing and latch circuit | May 20, 2018 | Issued |
Array
(
[id] => 16386255
[patent_doc_number] => 10811096
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-20
[patent_title] => Multi-block non-volatile memories with single unified interface
[patent_app_type] => utility
[patent_app_number] => 15/981920
[patent_app_country] => US
[patent_app_date] => 2018-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4519
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981920
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981920 | Multi-block non-volatile memories with single unified interface | May 16, 2018 | Issued |
Array
(
[id] => 14858705
[patent_doc_number] => 10418086
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-09-17
[patent_title] => Volatile memory storage apparatus and refresh method thereof
[patent_app_type] => utility
[patent_app_number] => 15/981922
[patent_app_country] => US
[patent_app_date] => 2018-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1854
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981922
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981922 | Volatile memory storage apparatus and refresh method thereof | May 16, 2018 | Issued |
Array
(
[id] => 14253163
[patent_doc_number] => 10276791
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-04-30
[patent_title] => Resistive random access memory device
[patent_app_type] => utility
[patent_app_number] => 15/965881
[patent_app_country] => US
[patent_app_date] => 2018-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 7752
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15965881
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/965881 | Resistive random access memory device | Apr 27, 2018 | Issued |
Array
(
[id] => 14047551
[patent_doc_number] => 20190079882
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-14
[patent_title] => OPERATION METHODS OF NONVOLATILE MEMORY DEVICES AND OPERATION METHODS OF MEMORY CONTROLLERS
[patent_app_type] => utility
[patent_app_number] => 15/964993
[patent_app_country] => US
[patent_app_date] => 2018-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14911
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15964993
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/964993 | Operation methods of nonvolatile memory devices and operation methods of memory controllers | Apr 26, 2018 | Issued |
Array
(
[id] => 16233686
[patent_doc_number] => 10741246
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-08-11
[patent_title] => Method, system and device for integration of volatile and non-volatile memory bitcells
[patent_app_type] => utility
[patent_app_number] => 15/960365
[patent_app_country] => US
[patent_app_date] => 2018-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 22
[patent_no_of_words] => 18931
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960365
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/960365 | Method, system and device for integration of volatile and non-volatile memory bitcells | Apr 22, 2018 | Issued |
Array
(
[id] => 13363319
[patent_doc_number] => 20180233199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-16
[patent_title] => Memory Cells, Memory Cell Arrays, Methods of Using and Methods of Making
[patent_app_type] => utility
[patent_app_number] => 15/948926
[patent_app_country] => US
[patent_app_date] => 2018-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 25659
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15948926
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/948926 | Memory cells, memory cell arrays, methods of using and methods of making | Apr 8, 2018 | Issued |