
Edgardo Ortiz
Examiner (ID: 14813)
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815 |
| Total Applications | 306 |
| Issued Applications | 269 |
| Pending Applications | 3 |
| Abandoned Applications | 34 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4243789
[patent_doc_number] => 06166406
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-26
[patent_title] => 'Precharge circuit and semiconductor storage device'
[patent_app_type] => 1
[patent_app_number] => 9/153341
[patent_app_country] => US
[patent_app_date] => 1998-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4570
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/166/06166406.pdf
[firstpage_image] =>[orig_patent_app_number] => 153341
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/153341 | Precharge circuit and semiconductor storage device | Sep 14, 1998 | Issued |
Array
(
[id] => 4264914
[patent_doc_number] => 06204543
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-20
[patent_title] => 'Semiconductor device having LDD structure and method for producing the same'
[patent_app_type] => 1
[patent_app_number] => 9/150253
[patent_app_country] => US
[patent_app_date] => 1998-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 14
[patent_no_of_words] => 3559
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/204/06204543.pdf
[firstpage_image] =>[orig_patent_app_number] => 150253
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/150253 | Semiconductor device having LDD structure and method for producing the same | Sep 9, 1998 | Issued |
Array
(
[id] => 4222408
[patent_doc_number] => 06111298
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-29
[patent_title] => 'Etch stop layer formed within a multi-layered gate conductor to provide for reduction of channel length'
[patent_app_type] => 1
[patent_app_number] => 9/145010
[patent_app_country] => US
[patent_app_date] => 1998-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 3787
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/111/06111298.pdf
[firstpage_image] =>[orig_patent_app_number] => 145010
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/145010 | Etch stop layer formed within a multi-layered gate conductor to provide for reduction of channel length | Aug 31, 1998 | Issued |
Array
(
[id] => 4276933
[patent_doc_number] => 06246086
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-12
[patent_title] => 'Structure of capacitor for dynamic random access memory and method of manufacturing thereof'
[patent_app_type] => 1
[patent_app_number] => 9/138624
[patent_app_country] => US
[patent_app_date] => 1998-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 2503
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 263
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/246/06246086.pdf
[firstpage_image] =>[orig_patent_app_number] => 138624
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/138624 | Structure of capacitor for dynamic random access memory and method of manufacturing thereof | Aug 23, 1998 | Issued |
Array
(
[id] => 4413726
[patent_doc_number] => 06310377
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-30
[patent_title] => 'Semiconductor device having an SOI structure'
[patent_app_type] => 1
[patent_app_number] => 9/134896
[patent_app_country] => US
[patent_app_date] => 1998-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 48
[patent_no_of_words] => 12521
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/310/06310377.pdf
[firstpage_image] =>[orig_patent_app_number] => 134896
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/134896 | Semiconductor device having an SOI structure | Aug 16, 1998 | Issued |
Array
(
[id] => 4355003
[patent_doc_number] => 06215137
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-10
[patent_title] => 'Micromechanical sensor for scanning thermal imaging microscope and method of making the same'
[patent_app_type] => 1
[patent_app_number] => 9/132762
[patent_app_country] => US
[patent_app_date] => 1998-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 56
[patent_no_of_words] => 11704
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/215/06215137.pdf
[firstpage_image] =>[orig_patent_app_number] => 132762
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/132762 | Micromechanical sensor for scanning thermal imaging microscope and method of making the same | Aug 11, 1998 | Issued |
Array
(
[id] => 4139617
[patent_doc_number] => 06121651
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-19
[patent_title] => 'Dram cell with three-sided-gate transfer device'
[patent_app_type] => 1
[patent_app_number] => 9/126412
[patent_app_country] => US
[patent_app_date] => 1998-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 29
[patent_no_of_words] => 6764
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/121/06121651.pdf
[firstpage_image] =>[orig_patent_app_number] => 126412
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/126412 | Dram cell with three-sided-gate transfer device | Jul 29, 1998 | Issued |
Array
(
[id] => 1229936
[patent_doc_number] => 06696723
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-02-24
[patent_title] => 'Electrically erasable, programmable, non-volatile memory device compatible with a CMOS/SOI production process'
[patent_app_type] => B2
[patent_app_number] => 09/123472
[patent_app_country] => US
[patent_app_date] => 1998-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3806
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 18
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/696/06696723.pdf
[firstpage_image] =>[orig_patent_app_number] => 09123472
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/123472 | Electrically erasable, programmable, non-volatile memory device compatible with a CMOS/SOI production process | Jul 27, 1998 | Issued |
Array
(
[id] => 4365982
[patent_doc_number] => 06255682
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Trench DRAM cells with self-aligned field plate'
[patent_app_type] => 1
[patent_app_number] => 9/122813
[patent_app_country] => US
[patent_app_date] => 1998-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 3307
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/255/06255682.pdf
[firstpage_image] =>[orig_patent_app_number] => 122813
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/122813 | Trench DRAM cells with self-aligned field plate | Jul 26, 1998 | Issued |
Array
(
[id] => 4309670
[patent_doc_number] => 06188115
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-13
[patent_title] => 'Semiconductor device with a conductive layer of small conductive resistance'
[patent_app_type] => 1
[patent_app_number] => 9/119047
[patent_app_country] => US
[patent_app_date] => 1998-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 35
[patent_no_of_words] => 6488
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/188/06188115.pdf
[firstpage_image] =>[orig_patent_app_number] => 119047
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/119047 | Semiconductor device with a conductive layer of small conductive resistance | Jul 19, 1998 | Issued |
Array
(
[id] => 4197619
[patent_doc_number] => 06043545
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-28
[patent_title] => 'MOSFET device with two spacers'
[patent_app_type] => 1
[patent_app_number] => 9/116533
[patent_app_country] => US
[patent_app_date] => 1998-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 2007
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/043/06043545.pdf
[firstpage_image] =>[orig_patent_app_number] => 116533
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/116533 | MOSFET device with two spacers | Jul 15, 1998 | Issued |
Array
(
[id] => 4139706
[patent_doc_number] => 06155537
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-05
[patent_title] => 'Deep submicron MOS transistors with a self-aligned gate electrode'
[patent_app_type] => 1
[patent_app_number] => 9/113037
[patent_app_country] => US
[patent_app_date] => 1998-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 3621
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/155/06155537.pdf
[firstpage_image] =>[orig_patent_app_number] => 113037
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/113037 | Deep submicron MOS transistors with a self-aligned gate electrode | Jul 8, 1998 | Issued |
Array
(
[id] => 4411767
[patent_doc_number] => 06172401
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-09
[patent_title] => 'Transistor device configurations for high voltage applications and improved device performance'
[patent_app_type] => 1
[patent_app_number] => 9/109231
[patent_app_country] => US
[patent_app_date] => 1998-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 5601
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/172/06172401.pdf
[firstpage_image] =>[orig_patent_app_number] => 109231
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/109231 | Transistor device configurations for high voltage applications and improved device performance | Jun 29, 1998 | Issued |
Array
(
[id] => 4253185
[patent_doc_number] => 06137143
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-24
[patent_title] => 'Diode and transistor design for high speed I/O'
[patent_app_type] => 1
[patent_app_number] => 9/107351
[patent_app_country] => US
[patent_app_date] => 1998-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 5259
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/137/06137143.pdf
[firstpage_image] =>[orig_patent_app_number] => 107351
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/107351 | Diode and transistor design for high speed I/O | Jun 29, 1998 | Issued |
| 09/102642 | SEMICONDUCTOR DEVICE WITH SILICIDE CONTACT STRUCTURE | Jun 22, 1998 | Abandoned |
Array
(
[id] => 4086895
[patent_doc_number] => 06054747
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-25
[patent_title] => 'Integrated photoreceiver having metal-insulator-semiconductor switch'
[patent_app_type] => 1
[patent_app_number] => 9/100801
[patent_app_country] => US
[patent_app_date] => 1998-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 4100
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/054/06054747.pdf
[firstpage_image] =>[orig_patent_app_number] => 100801
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/100801 | Integrated photoreceiver having metal-insulator-semiconductor switch | Jun 18, 1998 | Issued |
Array
(
[id] => 1218010
[patent_doc_number] => 06707120
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-16
[patent_title] => 'Field effect transistor'
[patent_app_type] => B1
[patent_app_number] => 09/097991
[patent_app_country] => US
[patent_app_date] => 1998-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 21
[patent_no_of_words] => 4288
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/707/06707120.pdf
[firstpage_image] =>[orig_patent_app_number] => 09097991
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/097991 | Field effect transistor | Jun 15, 1998 | Issued |
Array
(
[id] => 4413700
[patent_doc_number] => 06310375
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-30
[patent_title] => 'Trench capacitor with isolation collar and corresponding manufacturing method'
[patent_app_type] => 1
[patent_app_number] => 9/097783
[patent_app_country] => US
[patent_app_date] => 1998-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 36
[patent_no_of_words] => 12260
[patent_no_of_claims] => 6
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/310/06310375.pdf
[firstpage_image] =>[orig_patent_app_number] => 097783
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/097783 | Trench capacitor with isolation collar and corresponding manufacturing method | Jun 14, 1998 | Issued |
Array
(
[id] => 1476275
[patent_doc_number] => 06388279
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-14
[patent_title] => 'Semiconductor substrate manufacturing method, semiconductor pressure sensor and manufacturing method thereof'
[patent_app_type] => B1
[patent_app_number] => 09/095131
[patent_app_country] => US
[patent_app_date] => 1998-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[patent_no_of_words] => 12931
[patent_no_of_claims] => 8
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/388/06388279.pdf
[firstpage_image] =>[orig_patent_app_number] => 09095131
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/095131 | Semiconductor substrate manufacturing method, semiconductor pressure sensor and manufacturing method thereof | Jun 9, 1998 | Issued |
Array
(
[id] => 4136885
[patent_doc_number] => 06034395
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-07
[patent_title] => 'Semiconductor device having a reduced height floating gate'
[patent_app_type] => 1
[patent_app_number] => 9/092352
[patent_app_country] => US
[patent_app_date] => 1998-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3805
[patent_no_of_claims] => 9
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/034/06034395.pdf
[firstpage_image] =>[orig_patent_app_number] => 092352
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/092352 | Semiconductor device having a reduced height floating gate | Jun 4, 1998 | Issued |