Search

Edgardo Ortiz

Examiner (ID: 14813)

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
306
Issued Applications
269
Pending Applications
3
Abandoned Applications
34

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1189919 [patent_doc_number] => 06734515 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-11 [patent_title] => 'Semiconductor light receiving element' [patent_app_type] => B1 [patent_app_number] => 09/787502 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 7493 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/734/06734515.pdf [firstpage_image] =>[orig_patent_app_number] => 09787502 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/787502
Semiconductor light receiving element Mar 15, 2001 Issued
Array ( [id] => 5922091 [patent_doc_number] => 20020115290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Semiconductor structures having multiple conductive layers in an opening, and methods for fabricating same' [patent_app_type] => new [patent_app_number] => 09/792311 [patent_app_country] => US [patent_app_date] => 2001-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5893 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20020115290.pdf [firstpage_image] =>[orig_patent_app_number] => 09792311 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/792311
Semiconductor structures having multiple conductive layers in an opening, and methods for fabricating same Feb 21, 2001 Issued
Array ( [id] => 7623497 [patent_doc_number] => 06686668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Structure and method of forming bitline contacts for a vertical DRAM array using a line bitline contact mask' [patent_app_type] => B2 [patent_app_number] => 09/764833 [patent_app_country] => US [patent_app_date] => 2001-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 2694 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686668.pdf [firstpage_image] =>[orig_patent_app_number] => 09764833 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/764833
Structure and method of forming bitline contacts for a vertical DRAM array using a line bitline contact mask Jan 16, 2001 Issued
Array ( [id] => 6300526 [patent_doc_number] => 20020093067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-18 [patent_title] => 'SUSPENDED MICROMACHINED STRUCTURE' [patent_app_type] => new [patent_app_number] => 09/761291 [patent_app_country] => US [patent_app_date] => 2001-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2652 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20020093067.pdf [firstpage_image] =>[orig_patent_app_number] => 09761291 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/761291
Suspended micromachined structure Jan 15, 2001 Issued
Array ( [id] => 1125228 [patent_doc_number] => 06794705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-21 [patent_title] => 'Multi-layer Pt electrode for DRAM and FRAM with high K dielectric materials' [patent_app_type] => B2 [patent_app_number] => 09/751551 [patent_app_country] => US [patent_app_date] => 2000-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 3243 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/794/06794705.pdf [firstpage_image] =>[orig_patent_app_number] => 09751551 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751551
Multi-layer Pt electrode for DRAM and FRAM with high K dielectric materials Dec 27, 2000 Issued
Array ( [id] => 1330587 [patent_doc_number] => 06600202 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Compact sensing apparatus having reduced cross section and methods of mounting same' [patent_app_type] => B1 [patent_app_number] => 09/680722 [patent_app_country] => US [patent_app_date] => 2000-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7213 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/600/06600202.pdf [firstpage_image] =>[orig_patent_app_number] => 09680722 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/680722
Compact sensing apparatus having reduced cross section and methods of mounting same Oct 5, 2000 Issued
Array ( [id] => 1319066 [patent_doc_number] => 06608357 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and process for production thereof' [patent_app_type] => B1 [patent_app_number] => 09/641768 [patent_app_country] => US [patent_app_date] => 2000-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 37 [patent_no_of_words] => 9274 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/608/06608357.pdf [firstpage_image] =>[orig_patent_app_number] => 09641768 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/641768
Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and process for production thereof Aug 20, 2000 Issued
Array ( [id] => 1561718 [patent_doc_number] => 06437393 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Non-volatile memory cell with silicided contacts' [patent_app_type] => B1 [patent_app_number] => 09/636114 [patent_app_country] => US [patent_app_date] => 2000-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 2834 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/437/06437393.pdf [firstpage_image] =>[orig_patent_app_number] => 09636114 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/636114
Non-volatile memory cell with silicided contacts Aug 9, 2000 Issued
Array ( [id] => 1480510 [patent_doc_number] => 06452225 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Method and structure of etching a memory cell polysilicon gate layer using resist mask and etched silicon oxynitride' [patent_app_type] => B1 [patent_app_number] => 09/617820 [patent_app_country] => US [patent_app_date] => 2000-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3453 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452225.pdf [firstpage_image] =>[orig_patent_app_number] => 09617820 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/617820
Method and structure of etching a memory cell polysilicon gate layer using resist mask and etched silicon oxynitride Jul 16, 2000 Issued
Array ( [id] => 1336362 [patent_doc_number] => 06597011 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Dual non-parallel electronic field electro-optic effect device' [patent_app_type] => B1 [patent_app_number] => 09/606611 [patent_app_country] => US [patent_app_date] => 2000-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8533 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/597/06597011.pdf [firstpage_image] =>[orig_patent_app_number] => 09606611 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/606611
Dual non-parallel electronic field electro-optic effect device Jun 28, 2000 Issued
Array ( [id] => 1459807 [patent_doc_number] => 06426514 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Dual non-parallel electronic field electro-optic effect device' [patent_app_type] => B1 [patent_app_number] => 09/612393 [patent_app_country] => US [patent_app_date] => 2000-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 3203 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/426/06426514.pdf [firstpage_image] =>[orig_patent_app_number] => 09612393 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/612393
Dual non-parallel electronic field electro-optic effect device Jun 28, 2000 Issued
Array ( [id] => 7643542 [patent_doc_number] => 06429499 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Method and apparatus for a monolithic integrated MESFET and p-i-n optical receiver' [patent_app_type] => B1 [patent_app_number] => 09/573748 [patent_app_country] => US [patent_app_date] => 2000-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 1858 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429499.pdf [firstpage_image] =>[orig_patent_app_number] => 09573748 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/573748
Method and apparatus for a monolithic integrated MESFET and p-i-n optical receiver May 17, 2000 Issued
Array ( [id] => 1181987 [patent_doc_number] => 06740911 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-25 [patent_title] => '-WO3-gate ISFET devices and method of making the same' [patent_app_type] => B1 [patent_app_number] => 09/533591 [patent_app_country] => US [patent_app_date] => 2000-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4797 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/740/06740911.pdf [firstpage_image] =>[orig_patent_app_number] => 09533591 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/533591
-WO3-gate ISFET devices and method of making the same Mar 22, 2000 Issued
Array ( [id] => 4309891 [patent_doc_number] => 06326660 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Method to improve the capacity of data retention and increase the coupling ratio of source to floating gate in split-gate flash' [patent_app_type] => 1 [patent_app_number] => 9/524522 [patent_app_country] => US [patent_app_date] => 2000-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 15 [patent_no_of_words] => 3812 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326660.pdf [firstpage_image] =>[orig_patent_app_number] => 524522 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/524522
Method to improve the capacity of data retention and increase the coupling ratio of source to floating gate in split-gate flash Mar 12, 2000 Issued
Array ( [id] => 1406481 [patent_doc_number] => 06538279 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-25 [patent_title] => 'High-side switch with depletion-mode device' [patent_app_type] => B1 [patent_app_number] => 09/521330 [patent_app_country] => US [patent_app_date] => 2000-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5056 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/538/06538279.pdf [firstpage_image] =>[orig_patent_app_number] => 09521330 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/521330
High-side switch with depletion-mode device Mar 8, 2000 Issued
Array ( [id] => 1518950 [patent_doc_number] => 06501145 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Semiconductor component and method for producing the same' [patent_app_type] => B1 [patent_app_number] => 09/424991 [patent_app_country] => US [patent_app_date] => 2000-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4297 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/501/06501145.pdf [firstpage_image] =>[orig_patent_app_number] => 09424991 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/424991
Semiconductor component and method for producing the same Mar 2, 2000 Issued
Array ( [id] => 1022478 [patent_doc_number] => 06888183 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-03 [patent_title] => 'Manufacture method for semiconductor device with small variation in MOS threshold voltage' [patent_app_type] => utility [patent_app_number] => 09/518709 [patent_app_country] => US [patent_app_date] => 2000-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 5206 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/888/06888183.pdf [firstpage_image] =>[orig_patent_app_number] => 09518709 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/518709
Manufacture method for semiconductor device with small variation in MOS threshold voltage Mar 2, 2000 Issued
Array ( [id] => 1254238 [patent_doc_number] => 06670659 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-30 [patent_title] => 'Ferroelectric data processing device' [patent_app_type] => B1 [patent_app_number] => 09/463982 [patent_app_country] => US [patent_app_date] => 2000-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 7743 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/670/06670659.pdf [firstpage_image] =>[orig_patent_app_number] => 09463982 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/463982
Ferroelectric data processing device Feb 14, 2000 Issued
Array ( [id] => 1152986 [patent_doc_number] => 06770924 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Amorphous TiN films for an integrated capacitor dielectric/bottom plate using high dielectric constant materials' [patent_app_type] => B1 [patent_app_number] => 09/496081 [patent_app_country] => US [patent_app_date] => 2000-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1389 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/770/06770924.pdf [firstpage_image] =>[orig_patent_app_number] => 09496081 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/496081
Amorphous TiN films for an integrated capacitor dielectric/bottom plate using high dielectric constant materials Jan 31, 2000 Issued
Array ( [id] => 1421352 [patent_doc_number] => 06522004 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => B1 [patent_app_number] => 09/493623 [patent_app_country] => US [patent_app_date] => 2000-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5466 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/522/06522004.pdf [firstpage_image] =>[orig_patent_app_number] => 09493623 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/493623
Semiconductor integrated circuit device Jan 27, 2000 Issued
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