Search

Edgardo Ortiz

Examiner (ID: 9828)

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
306
Issued Applications
269
Pending Applications
3
Abandoned Applications
34

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1132305 [patent_doc_number] => 06787840 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-07 [patent_title] => 'Nitridated tunnel oxide barriers for flash memory technology circuitry' [patent_app_type] => B1 [patent_app_number] => 09/492931 [patent_app_country] => US [patent_app_date] => 2000-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 2333 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/787/06787840.pdf [firstpage_image] =>[orig_patent_app_number] => 09492931 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/492931
Nitridated tunnel oxide barriers for flash memory technology circuitry Jan 26, 2000 Issued
Array ( [id] => 1106172 [patent_doc_number] => 06812521 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-02 [patent_title] => 'Method and apparatus for improved performance of flash memory cell devices' [patent_app_type] => B1 [patent_app_number] => 09/492243 [patent_app_country] => US [patent_app_date] => 2000-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1988 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812521.pdf [firstpage_image] =>[orig_patent_app_number] => 09492243 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/492243
Method and apparatus for improved performance of flash memory cell devices Jan 26, 2000 Issued
Array ( [id] => 1288563 [patent_doc_number] => 06639279 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-28 [patent_title] => 'Semiconductor transistor having interface layer between semiconductor and insulating layers' [patent_app_type] => B1 [patent_app_number] => 09/484672 [patent_app_country] => US [patent_app_date] => 2000-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2198 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/639/06639279.pdf [firstpage_image] =>[orig_patent_app_number] => 09484672 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/484672
Semiconductor transistor having interface layer between semiconductor and insulating layers Jan 17, 2000 Issued
Array ( [id] => 1360004 [patent_doc_number] => 06576939 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'Semiconductor processing methods, methods of forming electronic components, and transistors' [patent_app_type] => B1 [patent_app_number] => 09/480072 [patent_app_country] => US [patent_app_date] => 2000-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2885 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/576/06576939.pdf [firstpage_image] =>[orig_patent_app_number] => 09480072 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/480072
Semiconductor processing methods, methods of forming electronic components, and transistors Jan 9, 2000 Issued
Array ( [id] => 4331475 [patent_doc_number] => 06329680 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Semiconductor integrated circuit device and process for manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/479592 [patent_app_country] => US [patent_app_date] => 2000-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 7334 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329680.pdf [firstpage_image] =>[orig_patent_app_number] => 479592 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/479592
Semiconductor integrated circuit device and process for manufacturing the same Jan 6, 2000 Issued
Array ( [id] => 1306210 [patent_doc_number] => 06621157 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Method and device for encapsulating an electronic component in particular a semiconductor chip' [patent_app_type] => B1 [patent_app_number] => 09/478411 [patent_app_country] => US [patent_app_date] => 2000-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 26 [patent_no_of_words] => 5561 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/621/06621157.pdf [firstpage_image] =>[orig_patent_app_number] => 09478411 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/478411
Method and device for encapsulating an electronic component in particular a semiconductor chip Jan 5, 2000 Issued
Array ( [id] => 1404305 [patent_doc_number] => 06541863 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-01 [patent_title] => 'Semiconductor device having a reduced signal processing time and a method of fabricating the same' [patent_app_type] => B1 [patent_app_number] => 09/475572 [patent_app_country] => US [patent_app_date] => 2000-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4063 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/541/06541863.pdf [firstpage_image] =>[orig_patent_app_number] => 09475572 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/475572
Semiconductor device having a reduced signal processing time and a method of fabricating the same Jan 4, 2000 Issued
Array ( [id] => 4361141 [patent_doc_number] => 06201282 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Two bit ROM cell and process for producing same' [patent_app_type] => 1 [patent_app_number] => 9/471823 [patent_app_country] => US [patent_app_date] => 1999-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4904 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201282.pdf [firstpage_image] =>[orig_patent_app_number] => 471823 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/471823
Two bit ROM cell and process for producing same Dec 22, 1999 Issued
Array ( [id] => 1480500 [patent_doc_number] => 06452222 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'MIS type semiconductor device and method for manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/458510 [patent_app_country] => US [patent_app_date] => 1999-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 7226 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452222.pdf [firstpage_image] =>[orig_patent_app_number] => 09458510 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/458510
MIS type semiconductor device and method for manufacturing the same Dec 12, 1999 Issued
Array ( [id] => 4310265 [patent_doc_number] => 06252284 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Planarized silicon fin device' [patent_app_type] => 1 [patent_app_number] => 9/458531 [patent_app_country] => US [patent_app_date] => 1999-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 5026 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/252/06252284.pdf [firstpage_image] =>[orig_patent_app_number] => 458531 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/458531
Planarized silicon fin device Dec 8, 1999 Issued
09/456491 PACKAGE FOR SEMICONDUCTOR PHOTOELECTRIC DEVICE Dec 6, 1999 Abandoned
Array ( [id] => 1480532 [patent_doc_number] => 06452232 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Semiconductor device having SOI structure and manufacturing method thereof' [patent_app_type] => B1 [patent_app_number] => 09/451843 [patent_app_country] => US [patent_app_date] => 1999-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 7931 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452232.pdf [firstpage_image] =>[orig_patent_app_number] => 09451843 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/451843
Semiconductor device having SOI structure and manufacturing method thereof Nov 30, 1999 Issued
Array ( [id] => 1561806 [patent_doc_number] => 06437419 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Emitter ballast resistor with enhanced body effect to improve the short circuit withstand capability of power devices' [patent_app_type] => B1 [patent_app_number] => 09/450872 [patent_app_country] => US [patent_app_date] => 1999-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 4418 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/437/06437419.pdf [firstpage_image] =>[orig_patent_app_number] => 09450872 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/450872
Emitter ballast resistor with enhanced body effect to improve the short circuit withstand capability of power devices Nov 28, 1999 Issued
Array ( [id] => 1309982 [patent_doc_number] => 06617644 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/432662 [patent_app_country] => US [patent_app_date] => 1999-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 82 [patent_no_of_words] => 22764 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 33 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/617/06617644.pdf [firstpage_image] =>[orig_patent_app_number] => 09432662 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/432662
Semiconductor device and method of manufacturing the same Nov 2, 1999 Issued
Array ( [id] => 1544256 [patent_doc_number] => 06373102 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Process for fabricating a channel region of a transistor device with ion implantation and the transistor device formed therefrom' [patent_app_type] => B1 [patent_app_number] => 09/433782 [patent_app_country] => US [patent_app_date] => 1999-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1749 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/373/06373102.pdf [firstpage_image] =>[orig_patent_app_number] => 09433782 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/433782
Process for fabricating a channel region of a transistor device with ion implantation and the transistor device formed therefrom Nov 2, 1999 Issued
Array ( [id] => 1180389 [patent_doc_number] => 06744116 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Thin film using non-thermal techniques' [patent_app_type] => B1 [patent_app_number] => 09/416501 [patent_app_country] => US [patent_app_date] => 1999-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 2765 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744116.pdf [firstpage_image] =>[orig_patent_app_number] => 09416501 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/416501
Thin film using non-thermal techniques Oct 7, 1999 Issued
Array ( [id] => 6985586 [patent_doc_number] => 20010035558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-01 [patent_title] => 'SACRIFICIAL SPACER FOR INTEGRATED CIRCUIT TRANSISTORS' [patent_app_type] => new [patent_app_number] => 09/412682 [patent_app_country] => US [patent_app_date] => 1999-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2346 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20010035558.pdf [firstpage_image] =>[orig_patent_app_number] => 09412682 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/412682
SACRIFICIAL SPACER FOR INTEGRATED CIRCUIT TRANSISTORS Oct 4, 1999 Abandoned
09/410962 METHOD AND SYSTEM FOR REDUCING SHORT CHANNEL EFFECTS IN A MEMORY DEVICE BY REDUCTION OF DRAIN THERMAL CYCLING Oct 4, 1999 Abandoned
Array ( [id] => 6205378 [patent_doc_number] => 20020070413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING IMPROVED SHORT CHANNEL RESISTANCE' [patent_app_type] => new [patent_app_number] => 09/411942 [patent_app_country] => US [patent_app_date] => 1999-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5871 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20020070413.pdf [firstpage_image] =>[orig_patent_app_number] => 09411942 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/411942
Semiconductor device having improved short channel resistance Oct 3, 1999 Issued
Array ( [id] => 4389947 [patent_doc_number] => 06262467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Etch barrier structure of a semiconductor device and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/410613 [patent_app_country] => US [patent_app_date] => 1999-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2699 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/262/06262467.pdf [firstpage_image] =>[orig_patent_app_number] => 410613 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/410613
Etch barrier structure of a semiconductor device and method for fabricating the same Sep 30, 1999 Issued
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