
Eduardo A. Rodela
Examiner (ID: 88)
| Most Active Art Unit | 2893 |
| Art Unit(s) | 2826, 2893 |
| Total Applications | 1380 |
| Issued Applications | 1130 |
| Pending Applications | 83 |
| Abandoned Applications | 198 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 15000163
[patent_doc_number] => 20190319039
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-17
[patent_title] => VERTICAL SEMICONDUCTOR MEMORY DEVICE STRUCTURES INCLUDING VERTICAL CHANNEL STRUCTURES AND VERTICAL DUMMY STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 16/454914
[patent_app_country] => US
[patent_app_date] => 2019-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10999
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16454914
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/454914 | Vertical semiconductor memory device structures including vertical channel structures and vertical dummy structures | Jun 26, 2019 | Issued |
Array
(
[id] => 15000359
[patent_doc_number] => 20190319137
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-17
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/453486
[patent_app_country] => US
[patent_app_date] => 2019-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11984
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16453486
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/453486 | Semiconductor device | Jun 25, 2019 | Issued |
Array
(
[id] => 15300067
[patent_doc_number] => 20190393169
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-26
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/444823
[patent_app_country] => US
[patent_app_date] => 2019-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17399
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444823
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/444823 | Semiconductor device | Jun 17, 2019 | Issued |
Array
(
[id] => 17906492
[patent_doc_number] => 11460341
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-04
[patent_title] => Wafer scale ultrasonic sensor assembly and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/429801
[patent_app_country] => US
[patent_app_date] => 2019-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 33
[patent_no_of_words] => 6923
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 280
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16429801
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/429801 | Wafer scale ultrasonic sensor assembly and method for manufacturing the same | Jun 2, 2019 | Issued |
Array
(
[id] => 17189060
[patent_doc_number] => 20210335945
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-28
[patent_title] => DISPLAY PANEL AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/495199
[patent_app_country] => US
[patent_app_date] => 2019-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3289
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16495199
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/495199 | Display panel and electronic device | May 28, 2019 | Issued |
Array
(
[id] => 16594063
[patent_doc_number] => 10903340
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-01-26
[patent_title] => Laterally diffused metal oxide semiconductor structure and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/413792
[patent_app_country] => US
[patent_app_date] => 2019-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5356
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413792
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/413792 | Laterally diffused metal oxide semiconductor structure and method for manufacturing the same | May 15, 2019 | Issued |
Array
(
[id] => 15641533
[patent_doc_number] => 10593778
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-03-17
[patent_title] => Electrostatic doping-based all GNR tunnel field-effect transistor
[patent_app_type] => utility
[patent_app_number] => 16/413049
[patent_app_country] => US
[patent_app_date] => 2019-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 653
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413049
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/413049 | Electrostatic doping-based all GNR tunnel field-effect transistor | May 14, 2019 | Issued |
Array
(
[id] => 16418048
[patent_doc_number] => 10825950
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-03
[patent_title] => Semiconductor surface passivation
[patent_app_type] => utility
[patent_app_number] => 16/411419
[patent_app_country] => US
[patent_app_date] => 2019-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 5198
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411419
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/411419 | Semiconductor surface passivation | May 13, 2019 | Issued |
Array
(
[id] => 15185193
[patent_doc_number] => 20190363188
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-28
[patent_title] => LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/411318
[patent_app_country] => US
[patent_app_date] => 2019-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5659
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411318
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/411318 | Laterally diffused metal oxide semiconductor device and method for manufacturing the same | May 13, 2019 | Issued |
Array
(
[id] => 16566909
[patent_doc_number] => 10892286
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-01-12
[patent_title] => Imaging device
[patent_app_type] => utility
[patent_app_number] => 16/411207
[patent_app_country] => US
[patent_app_date] => 2019-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 20311
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411207
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/411207 | Imaging device | May 13, 2019 | Issued |
Array
(
[id] => 15184901
[patent_doc_number] => 20190363042
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-28
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/411357
[patent_app_country] => US
[patent_app_date] => 2019-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7325
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411357
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/411357 | Semiconductor device | May 13, 2019 | Issued |
Array
(
[id] => 16456181
[patent_doc_number] => 20200365607
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-19
[patent_title] => ONE-TIME PROGRAMMABLE DEVICE COMPATIBLE WITH VERTICAL TRANSISTOR PROCESSING
[patent_app_type] => utility
[patent_app_number] => 16/411305
[patent_app_country] => US
[patent_app_date] => 2019-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6649
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411305
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/411305 | One-time programmable device compatible with vertical transistor processing | May 13, 2019 | Issued |
Array
(
[id] => 16746425
[patent_doc_number] => 10971426
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-04-06
[patent_title] => Semiconductor package
[patent_app_type] => utility
[patent_app_number] => 16/411191
[patent_app_country] => US
[patent_app_date] => 2019-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5057
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411191
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/411191 | Semiconductor package | May 13, 2019 | Issued |
Array
(
[id] => 16456261
[patent_doc_number] => 20200365687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-19
[patent_title] => NANOSHEET BOTTOM ISOLATION AND SOURCE OR DRAIN EPITAXIAL GROWTH
[patent_app_type] => utility
[patent_app_number] => 16/411350
[patent_app_country] => US
[patent_app_date] => 2019-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9191
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411350
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/411350 | Nanosheet bottom isolation and source or drain epitaxial growth | May 13, 2019 | Issued |
Array
(
[id] => 18735810
[patent_doc_number] => 11804553
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-31
[patent_title] => Transition metal dichalcogenide transistor and preparation method thereof
[patent_app_type] => utility
[patent_app_number] => 17/280825
[patent_app_country] => US
[patent_app_date] => 2019-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 5560
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17280825
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/280825 | Transition metal dichalcogenide transistor and preparation method thereof | May 4, 2019 | Issued |
Array
(
[id] => 15760699
[patent_doc_number] => 10622482
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-04-14
[patent_title] => Gate cut using selective deposition to prevent oxide loss
[patent_app_type] => utility
[patent_app_number] => 16/402343
[patent_app_country] => US
[patent_app_date] => 2019-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 5545
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16402343
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/402343 | Gate cut using selective deposition to prevent oxide loss | May 2, 2019 | Issued |
Array
(
[id] => 14875177
[patent_doc_number] => 20190287830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-19
[patent_title] => SUBSTRATE PROCESSING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/401893
[patent_app_country] => US
[patent_app_date] => 2019-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12655
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16401893
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/401893 | Substrate processing apparatus and method of manufacturing semiconductor device | May 1, 2019 | Issued |
Array
(
[id] => 15703601
[patent_doc_number] => 10607988
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-03-31
[patent_title] => Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages
[patent_app_type] => utility
[patent_app_number] => 16/398501
[patent_app_country] => US
[patent_app_date] => 2019-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 9592
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16398501
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/398501 | Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages | Apr 29, 2019 | Issued |
Array
(
[id] => 17730889
[patent_doc_number] => 11387291
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-12
[patent_title] => Photoelectric sensor, display panel and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/605493
[patent_app_country] => US
[patent_app_date] => 2019-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 7599
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16605493
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/605493 | Photoelectric sensor, display panel and manufacturing method thereof | Apr 27, 2019 | Issued |
Array
(
[id] => 15000327
[patent_doc_number] => 20190319121
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-17
[patent_title] => SEMICONDUCTOR DEVICE HAVING A NECKED SEMICONDUCTOR BODY AND METHOD OF FORMING SEMICONDUCTOR BODIES OF VARYING WIDTH
[patent_app_type] => utility
[patent_app_number] => 16/393290
[patent_app_country] => US
[patent_app_date] => 2019-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6963
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16393290
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/393290 | Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width | Apr 23, 2019 | Issued |