Search

Eduardo A. Rodela

Examiner (ID: 88)

Most Active Art Unit
2893
Art Unit(s)
2826, 2893
Total Applications
1380
Issued Applications
1130
Pending Applications
83
Abandoned Applications
198

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17417204 [patent_doc_number] => 20220052108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/373346 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14044 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17373346 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/373346
Display device and method of manufacturing the same Jul 11, 2021 Issued
Array ( [id] => 18481149 [patent_doc_number] => 11694901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Field-effect transistor and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/371142 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 11370 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371142 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/371142
Field-effect transistor and method for manufacturing the same Jul 8, 2021 Issued
Array ( [id] => 19260936 [patent_doc_number] => 12021001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Semiconductor module and manufacturing method of semiconductor module [patent_app_type] => utility [patent_app_number] => 17/365279 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 7775 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365279 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365279
Semiconductor module and manufacturing method of semiconductor module Jun 30, 2021 Issued
Array ( [id] => 18039983 [patent_doc_number] => 20220384200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => METHOD OF CUTTING FIN [patent_app_type] => utility [patent_app_number] => 17/359669 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17359669 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/359669
Method of cutting fin Jun 27, 2021 Issued
Array ( [id] => 19919743 [patent_doc_number] => 12295139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Three-dimensional memory devices and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/352244 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 13105 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352244
Three-dimensional memory devices and methods for forming the same Jun 17, 2021 Issued
Array ( [id] => 18081211 [patent_doc_number] => 20220406823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => IMAGE SENSOR WITH PHOTOSENSITIVITY ENHANCEMENT REGION [patent_app_type] => utility [patent_app_number] => 17/349202 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349202 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/349202
Image sensor with photosensitivity enhancement region Jun 15, 2021 Issued
Array ( [id] => 19161225 [patent_doc_number] => 20240153932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => ARRAY SUBSTRATE AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/778478 [patent_app_country] => US [patent_app_date] => 2021-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17778478 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/778478
ARRAY SUBSTRATE AND DISPLAY PANEL May 30, 2021 Pending
Array ( [id] => 17100145 [patent_doc_number] => 20210287936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => METHOD FOR FILLING RECESSED FEATURES IN SEMICONDUCTOR DEVICES WITH A LOW-RESISTIVITY METAL [patent_app_type] => utility [patent_app_number] => 17/334389 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17334389 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/334389
Method for filling recessed features in semiconductor devices with a low-resistivity metal May 27, 2021 Issued
Array ( [id] => 18040150 [patent_doc_number] => 20220384367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => MRAM-BASED CHIP IDENTIFICATION WITH FREE RANDOM PROGRAMMING [patent_app_type] => utility [patent_app_number] => 17/329824 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7340 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329824 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/329824
MRAM-based chip identification with free random programming May 24, 2021 Issued
Array ( [id] => 17085687 [patent_doc_number] => 20210280694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => Liner for A Bi-Layer Gate Helmet and the Fabrication Thereof [patent_app_type] => utility [patent_app_number] => 17/322267 [patent_app_country] => US [patent_app_date] => 2021-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17322267 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/322267
Liner for a bi-layer gate helmet and the fabrication thereof May 16, 2021 Issued
Array ( [id] => 18141706 [patent_doc_number] => 20230015549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => DISPLAY PANEL, CIRCUIT BOARD, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/785196 [patent_app_country] => US [patent_app_date] => 2021-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6513 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17785196 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/785196
DISPLAY PANEL, CIRCUIT BOARD, AND DISPLAY DEVICE May 12, 2021 Pending
Array ( [id] => 19376803 [patent_doc_number] => 12068384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/315680 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 6447 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315680 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315680
Semiconductor device May 9, 2021 Issued
Array ( [id] => 18840167 [patent_doc_number] => 11848246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Integrated circuit package and method [patent_app_type] => utility [patent_app_number] => 17/314618 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 12625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314618 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/314618
Integrated circuit package and method May 6, 2021 Issued
Array ( [id] => 19494385 [patent_doc_number] => 12113109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/313638 [patent_app_country] => US [patent_app_date] => 2021-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 63 [patent_figures_cnt] => 63 [patent_no_of_words] => 14614 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17313638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/313638
Semiconductor device May 5, 2021 Issued
Array ( [id] => 17159196 [patent_doc_number] => 20210320247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => MAGNETIC TUNNEL JUNCTIONS WITH TUNABLE HIGH PERPENDICULAR MAGNETIC ANISOTROPY [patent_app_type] => utility [patent_app_number] => 17/307783 [patent_app_country] => US [patent_app_date] => 2021-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17307783 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/307783
Magnetic tunnel junctions with tunable high perpendicular magnetic anisotropy May 3, 2021 Issued
Array ( [id] => 19244581 [patent_doc_number] => 12015036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => High temporal resolution solid-state X-ray detection system [patent_app_type] => utility [patent_app_number] => 17/241594 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 6496 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241594 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/241594
High temporal resolution solid-state X-ray detection system Apr 26, 2021 Issued
Array ( [id] => 17189110 [patent_doc_number] => 20210335995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => CRYSTALLINE MULTILAYER STRUCTURE, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING CRYSTALLINE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/239931 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8947 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17239931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/239931
Crystalline multilayer structure, semiconductor device, and method of manufacturing crystalline structure Apr 25, 2021 Issued
Array ( [id] => 18371896 [patent_doc_number] => 11652078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => High voltage semiconductor package with pin fit leads [patent_app_type] => utility [patent_app_number] => 17/234964 [patent_app_country] => US [patent_app_date] => 2021-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 7880 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17234964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/234964
High voltage semiconductor package with pin fit leads Apr 19, 2021 Issued
Array ( [id] => 18608055 [patent_doc_number] => 11749533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Method of manufacturing a power semiconductor component arrangement or a power semiconductor component housing [patent_app_type] => utility [patent_app_number] => 17/233867 [patent_app_country] => US [patent_app_date] => 2021-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4499 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17233867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/233867
Method of manufacturing a power semiconductor component arrangement or a power semiconductor component housing Apr 18, 2021 Issued
Array ( [id] => 17855363 [patent_doc_number] => 20220285406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => FULL-REFLECTION DISPLAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND FULL-REFLECTION DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/624878 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4532 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17624878 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/624878
Full-reflection display substrate, manufacturing method thereof and full-reflection display device Apr 14, 2021 Issued
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