Search

Edward Chin

Examiner (ID: 5840, Phone: (571)270-1827 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813, 2893, 2821
Total Applications
802
Issued Applications
645
Pending Applications
102
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19546683 [patent_doc_number] => 20240363719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE [patent_app_type] => utility [patent_app_number] => 18/770040 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770040 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770040
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE Jul 10, 2024 Pending
Array ( [id] => 19546690 [patent_doc_number] => 20240363726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => CAPPING LAYER FOR GUIDE ELECTRODES [patent_app_type] => utility [patent_app_number] => 18/765932 [patent_app_country] => US [patent_app_date] => 2024-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18765932 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/765932
CAPPING LAYER FOR GUIDE ELECTRODES Jul 7, 2024 Pending
Array ( [id] => 19409097 [patent_doc_number] => 20240292608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/659188 [patent_app_country] => US [patent_app_date] => 2024-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18659188 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/659188
SEMICONDUCTOR MEMORY DEVICE May 8, 2024 Pending
Array ( [id] => 19337066 [patent_doc_number] => 20240251496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => SEMICONDUCTOR MANUFACTURING APPARATUS AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/628152 [patent_app_country] => US [patent_app_date] => 2024-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18628152 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/628152
Semiconductor manufacturing apparatus and operating method thereof Apr 4, 2024 Issued
Array ( [id] => 19337113 [patent_doc_number] => 20240251543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SHIELD STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/623929 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20412 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623929 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623929
MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SHIELD STRUCTURES Mar 31, 2024 Pending
Array ( [id] => 19900356 [patent_doc_number] => 12278296 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-15 [patent_title] => Method for manufacturing back-contact solar cell and back-contact solar cell [patent_app_type] => utility [patent_app_number] => 18/592500 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 7240 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592500 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/592500
Method for manufacturing back-contact solar cell and back-contact solar cell Feb 28, 2024 Issued
Array ( [id] => 20130531 [patent_doc_number] => 12372840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Liquid crystal display device [patent_app_type] => utility [patent_app_number] => 18/414623 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414623 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/414623
Liquid crystal display device Jan 16, 2024 Issued
Array ( [id] => 20130531 [patent_doc_number] => 12372840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Liquid crystal display device [patent_app_type] => utility [patent_app_number] => 18/414623 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414623 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/414623
Liquid crystal display device Jan 16, 2024 Issued
Array ( [id] => 19721899 [patent_doc_number] => 12207457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Semiconductor devices and methods of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/413434 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 12181 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413434 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413434
Semiconductor devices and methods of manufacturing the same Jan 15, 2024 Issued
Array ( [id] => 19672733 [patent_doc_number] => 12185528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/403817 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8803 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18403817 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/403817
Semiconductor memory device Jan 3, 2024 Issued
Array ( [id] => 19132788 [patent_doc_number] => 20240138141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => VERTICAL NON-VOLATILE MEMORY DEVICES HAVING A MULTI-STACK STRUCTURE WITH ENHANCED PHOTOLITHOGRAPHIC ALIGNMENT CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 18/402144 [patent_app_country] => US [patent_app_date] => 2024-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402144 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402144
Vertical non-volatile memory devices having a multi-stack structure with enhanced photolithographic alignment characteristics Jan 1, 2024 Issued
Array ( [id] => 20229302 [patent_doc_number] => 12417958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and PoP adhesive keep out zone [patent_app_type] => utility [patent_app_number] => 18/399205 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 1081 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399205 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399205
Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and PoP adhesive keep out zone Dec 27, 2023 Issued
Array ( [id] => 19118363 [patent_doc_number] => 20240130113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING INTEGRATED CAPACITOR AND VERTICAL CHANNEL TRANSISTOR AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/395793 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395793 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395793
SEMICONDUCTOR DEVICE INCLUDING INTEGRATED CAPACITOR AND VERTICAL CHANNEL TRANSISTOR AND METHODS OF FORMING THE SAME Dec 25, 2023 Pending
Array ( [id] => 19118363 [patent_doc_number] => 20240130113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING INTEGRATED CAPACITOR AND VERTICAL CHANNEL TRANSISTOR AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/395793 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395793 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395793
SEMICONDUCTOR DEVICE INCLUDING INTEGRATED CAPACITOR AND VERTICAL CHANNEL TRANSISTOR AND METHODS OF FORMING THE SAME Dec 25, 2023 Pending
Array ( [id] => 19038475 [patent_doc_number] => 20240088290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR COMPONENT AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/506567 [patent_app_country] => US [patent_app_date] => 2023-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8457 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18506567 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/506567
Semiconductor component and manufacturing method thereof Nov 9, 2023 Issued
Array ( [id] => 19038475 [patent_doc_number] => 20240088290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR COMPONENT AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/506567 [patent_app_country] => US [patent_app_date] => 2023-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8457 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18506567 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/506567
Semiconductor component and manufacturing method thereof Nov 9, 2023 Issued
Array ( [id] => 19988692 [patent_doc_number] => 20250126914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => IMAGE SENSORS AND METHODS OF MANUFACTURING THEM [patent_app_type] => utility [patent_app_number] => 18/487223 [patent_app_country] => US [patent_app_date] => 2023-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18487223 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/487223
IMAGE SENSORS AND METHODS OF MANUFACTURING THEM Oct 15, 2023 Pending
Array ( [id] => 19980255 [patent_doc_number] => 12347743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zone [patent_app_type] => utility [patent_app_number] => 18/374587 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 1081 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18374587 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/374587
Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zone Sep 27, 2023 Issued
Array ( [id] => 19980255 [patent_doc_number] => 12347743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zone [patent_app_type] => utility [patent_app_number] => 18/374587 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 1081 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18374587 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/374587
Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zone Sep 27, 2023 Issued
Array ( [id] => 18898612 [patent_doc_number] => 20240014097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => MICROELECTRONICS PACKAGE COMPRISING A PACKAGE-ON-PACKAGE (POP) ARCHITECTURE WITH INKJET BARRIER MATERIAL FOR CONTROLLING BONDLINE THICKNESS AND POP ADHESIVE KEEP OUT ZONE [patent_app_type] => utility [patent_app_number] => 18/372542 [patent_app_country] => US [patent_app_date] => 2023-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18372542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/372542
MICROELECTRONICS PACKAGE COMPRISING A PACKAGE-ON-PACKAGE (POP) ARCHITECTURE WITH INKJET BARRIER MATERIAL FOR CONTROLLING BONDLINE THICKNESS AND POP ADHESIVE KEEP OUT ZONE Sep 24, 2023 Pending
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