Edward Chin

Array ( [id] => 19661976 [patent_doc_number] => 20240429041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => FORMING A PLANAR SEMICONDUCTOR SURFACE [patent_app_type] => utility [patent_app_number] => 18/340201 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9211 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340201 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20668730 [patent_doc_number] => 12610519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/338345 [patent_app_country] => US [patent_app_date] => 2023-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 1077 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18338345 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18851122 [patent_doc_number] => 20230413526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/332876 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18332876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20612901 [patent_doc_number] => 12588522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Semiconductor package structure [patent_app_type] => utility [patent_app_number] => 18/331394 [patent_app_country] => US [patent_app_date] => 2023-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 1032 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18331394 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18680065 [patent_doc_number] => 20230317723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => Semiconductor Structures and Methods of Forming the Same [patent_app_type] => utility [patent_app_number] => 18/328014 [patent_app_country] => US [patent_app_date] => 2023-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6306 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18328014 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18698570 [patent_doc_number] => 20230329052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/204575 [patent_app_country] => US [patent_app_date] => 2023-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204575 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19621473 [patent_doc_number] => 20240407153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => MEMORY DEVICE AND FORMING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/204795 [patent_app_country] => US [patent_app_date] => 2023-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5454 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204795 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18663264 [patent_doc_number] => 20230309290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/327065 [patent_app_country] => US [patent_app_date] => 2023-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18327065 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20389325 [patent_doc_number] => 12489060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 18/203239 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 4653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203239 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18743915 [patent_doc_number] => 20230352903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => METHOD AND APPARATUS FOR MOUNTING AND COOLING A CIRCUIT COMPONENT [patent_app_type] => utility [patent_app_number] => 18/203056 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7403 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203056 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19285812 [patent_doc_number] => 20240222289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/319349 [patent_app_country] => US [patent_app_date] => 2023-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18612124 [patent_doc_number] => 20230278856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => Method and Structure for CMOS-MEMS Thin Film Encapsulation [patent_app_type] => utility [patent_app_number] => 18/315799 [patent_app_country] => US [patent_app_date] => 2023-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18315799 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19323213 [patent_doc_number] => 20240244761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => PACKAGES WITH A SHORTEST DISTANCE BETWEEN PACKAGE CONNECTORS AND A SEATING PLANE OF AT LEAST 6 MILS [patent_app_type] => utility [patent_app_number] => 18/196144 [patent_app_country] => US [patent_app_date] => 2023-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18196144 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18587657 [patent_doc_number] => 20230269922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND A COMMON PLATE [patent_app_type] => utility [patent_app_number] => 18/141046 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18571300 [patent_doc_number] => 20230261637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => RECESS FRAME STRUCTURE FOR REDUCTION OF SPURIOUS SIGNALS IN A BULK ACOUSTIC WAVE RESONATOR [patent_app_type] => utility [patent_app_number] => 18/138953 [patent_app_country] => US [patent_app_date] => 2023-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6252 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18138953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18572616 [patent_doc_number] => 20230262954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SHIELD STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/137852 [patent_app_country] => US [patent_app_date] => 2023-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18137852 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19454870 [patent_doc_number] => 20240315000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => MEMORY STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/301270 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18301270 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19484139 [patent_doc_number] => 20240332181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => STRUCTURE INCLUDING RC-BASED POWER RAIL ESD CLAMPING CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/128020 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18128020 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20205536 [patent_doc_number] => 12408331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Memory device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/125142 [patent_app_country] => US [patent_app_date] => 2023-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3374 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18125142 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19468209 [patent_doc_number] => 20240321879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => STACKED LINEAR DOUBLE-LENGTH VTFETS [patent_app_type] => utility [patent_app_number] => 18/188042 [patent_app_country] => US [patent_app_date] => 2023-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6515 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188042 [rel_patent_id] =>[rel_patent_doc_number] =>)