
Edward Chin
Examiner (ID: 4348, Phone: (571)270-1827 , Office: P/2813 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2893, 2813, 2821 |
| Total Applications | 819 |
| Issued Applications | 665 |
| Pending Applications | 83 |
| Abandoned Applications | 92 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19007773
[patent_doc_number] => 20240071844
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => SEMICONDUCTOR DEVICE LAYOUT STRUCTURE, METHOD FOR FORMING SAME, AND TEST SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/155769
[patent_app_country] => US
[patent_app_date] => 2023-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8446
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 323
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155769
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/155769 | Semiconductor device layout structure, method for forming same, and test system | Jan 17, 2023 | Issued |
Array
(
[id] => 18959043
[patent_doc_number] => 20240047370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-08
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME
[patent_app_type] => utility
[patent_app_number] => 18/153399
[patent_app_country] => US
[patent_app_date] => 2023-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6317
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153399
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/153399 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME | Jan 11, 2023 | Issued |
Array
(
[id] => 20177384
[patent_doc_number] => 12396149
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-19
[patent_title] => Method for fabricating semiconductor structure, and semiconductor structure
[patent_app_type] => utility
[patent_app_number] => 18/152769
[patent_app_country] => US
[patent_app_date] => 2023-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 2337
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 260
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18152769
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/152769 | Method for fabricating semiconductor structure, and semiconductor structure | Jan 10, 2023 | Issued |
Array
(
[id] => 20245906
[patent_doc_number] => 12426251
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-23
[patent_title] => Semiconductor structure, method for manufacturing semiconductor structure, and memory
[patent_app_type] => utility
[patent_app_number] => 18/095292
[patent_app_country] => US
[patent_app_date] => 2023-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 31
[patent_no_of_words] => 7988
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 331
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18095292
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/095292 | Semiconductor structure, method for manufacturing semiconductor structure, and memory | Jan 9, 2023 | Issued |
Array
(
[id] => 18502230
[patent_doc_number] => 20230225105
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-13
[patent_title] => SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/151973
[patent_app_country] => US
[patent_app_date] => 2023-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11956
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 526
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151973
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/151973 | SEMICONDUCTOR MEMORY DEVICE | Jan 8, 2023 | Pending |
Array
(
[id] => 18396751
[patent_doc_number] => 20230164972
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-25
[patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/150283
[patent_app_country] => US
[patent_app_date] => 2023-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8431
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18150283
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/150283 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | Jan 4, 2023 | Abandoned |
Array
(
[id] => 18833982
[patent_doc_number] => 20230402509
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => Transistor Gate Structures and Methods of Forming the Same
[patent_app_type] => utility
[patent_app_number] => 18/150474
[patent_app_country] => US
[patent_app_date] => 2023-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17537
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18150474
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/150474 | Transistor Gate Structures and Methods of Forming the Same | Jan 4, 2023 | Pending |
Array
(
[id] => 18745581
[patent_doc_number] => 20230354575
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/149236
[patent_app_country] => US
[patent_app_date] => 2023-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7560
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149236
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/149236 | Method of manufacturing semiconductor structure and semiconductor structure | Jan 2, 2023 | Issued |
Array
(
[id] => 18835321
[patent_doc_number] => 20230403848
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/084501
[patent_app_country] => US
[patent_app_date] => 2022-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4893
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18084501
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/084501 | Semiconductor memory device and method of fabricating the same | Dec 18, 2022 | Issued |
Array
(
[id] => 18475515
[patent_doc_number] => 20230209803
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/067133
[patent_app_country] => US
[patent_app_date] => 2022-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 38701
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18067133
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/067133 | SEMICONDUCTOR MEMORY DEVICE | Dec 15, 2022 | Pending |
Array
(
[id] => 20483972
[patent_doc_number] => 12532451
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-20
[patent_title] => DRAM transistor including horizonal body contact
[patent_app_type] => utility
[patent_app_number] => 18/061733
[patent_app_country] => US
[patent_app_date] => 2022-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 26
[patent_no_of_words] => 0
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18061733
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/061733 | DRAM transistor including horizonal body contact | Dec 4, 2022 | Issued |
Array
(
[id] => 18410592
[patent_doc_number] => 20230171945
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/994650
[patent_app_country] => US
[patent_app_date] => 2022-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12209
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 509
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17994650
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/994650 | SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE | Nov 27, 2022 | Abandoned |
Array
(
[id] => 18182748
[patent_doc_number] => 20230043478
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-09
[patent_title] => LIQUID CRYSTAL DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/971744
[patent_app_country] => US
[patent_app_date] => 2022-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4759
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17971744
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/971744 | Liquid crystal display device | Oct 23, 2022 | Issued |
Array
(
[id] => 18163991
[patent_doc_number] => 20230030585
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-02
[patent_title] => MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SHARED CHANNEL REGION
[patent_app_type] => utility
[patent_app_number] => 17/967441
[patent_app_country] => US
[patent_app_date] => 2022-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16897
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17967441
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/967441 | Memory device having 2-transistor vertical memory cell and shared channel region | Oct 16, 2022 | Issued |
Array
(
[id] => 18284586
[patent_doc_number] => 20230100058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-30
[patent_title] => SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/955955
[patent_app_country] => US
[patent_app_date] => 2022-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5642
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955955
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/955955 | SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF | Sep 28, 2022 | Pending |
Array
(
[id] => 20245910
[patent_doc_number] => 12426255
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-23
[patent_title] => Semiconductor structure, method for manufacturing semiconductor structure, and memory
[patent_app_type] => utility
[patent_app_number] => 17/949987
[patent_app_country] => US
[patent_app_date] => 2022-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 30
[patent_no_of_words] => 6582
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949987
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/949987 | Semiconductor structure, method for manufacturing semiconductor structure, and memory | Sep 20, 2022 | Issued |
Array
(
[id] => 20477993
[patent_doc_number] => 20260020214
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-01-15
[patent_title] => TWO ACCESS DEVICE, ONE STORAGE NODE CELL FOR VERTICAL THREE-DIMENSIONAL MEMORY
[patent_app_type] => utility
[patent_app_number] => 17/949496
[patent_app_country] => US
[patent_app_date] => 2022-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8103
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -28
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949496
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/949496 | TWO ACCESS DEVICE, ONE STORAGE NODE CELL FOR VERTICAL THREE-DIMENSIONAL MEMORY | Sep 20, 2022 | Pending |
Array
(
[id] => 18278400
[patent_doc_number] => 20230093872
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-30
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/946812
[patent_app_country] => US
[patent_app_date] => 2022-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8238
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17946812
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/946812 | Semiconductor device and method of manufacturing the same | Sep 15, 2022 | Issued |
Array
(
[id] => 19040382
[patent_doc_number] => 20240090197
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => APPARATUS COMPRISING A METAL PORTION IN THE TOP PORTION OF CAPACITOR STRUCTURE, AND RELATED METHODS
[patent_app_type] => utility
[patent_app_number] => 17/931717
[patent_app_country] => US
[patent_app_date] => 2022-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4668
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17931717
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/931717 | Apparatus comprising a metal portion in the top portion of capacitor structure, and related methods | Sep 12, 2022 | Issued |
Array
(
[id] => 20177400
[patent_doc_number] => 12396165
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-19
[patent_title] => Microelectronic devices, and related memory devices, electronic systems, and methods
[patent_app_type] => utility
[patent_app_number] => 17/931430
[patent_app_country] => US
[patent_app_date] => 2022-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2204
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17931430
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/931430 | Microelectronic devices, and related memory devices, electronic systems, and methods | Sep 11, 2022 | Issued |