
Edward J. Cain
Examiner (ID: 151, Phone: (571)272-1118 , Office: P/1762 )
| Most Active Art Unit | 1714 |
| Art Unit(s) | 1796, 1714, 1762, 1511, 1509, 0 |
| Total Applications | 3559 |
| Issued Applications | 2955 |
| Pending Applications | 148 |
| Abandoned Applications | 460 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12005562
[patent_doc_number] => 20170309717
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-26
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/517289
[patent_app_country] => US
[patent_app_date] => 2015-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4421
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15517289
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/517289 | Semiconductor device | Aug 2, 2015 | Issued |
Array
(
[id] => 11483250
[patent_doc_number] => 09589804
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-07
[patent_title] => 'Method of forming finFET gate oxide'
[patent_app_type] => utility
[patent_app_number] => 14/814370
[patent_app_country] => US
[patent_app_date] => 2015-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 6312
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14814370
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/814370 | Method of forming finFET gate oxide | Jul 29, 2015 | Issued |
Array
(
[id] => 11014530
[patent_doc_number] => 20160211483
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-21
[patent_title] => 'STRETCHABLE DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/811233
[patent_app_country] => US
[patent_app_date] => 2015-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5406
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14811233
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/811233 | Stretchable display device | Jul 27, 2015 | Issued |
Array
(
[id] => 13145823
[patent_doc_number] => 10090251
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-02
[patent_title] => Semiconductor chip having a dense arrangement of contact terminals
[patent_app_type] => utility
[patent_app_number] => 14/808798
[patent_app_country] => US
[patent_app_date] => 2015-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5122
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14808798
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/808798 | Semiconductor chip having a dense arrangement of contact terminals | Jul 23, 2015 | Issued |
Array
(
[id] => 10611022
[patent_doc_number] => 09331065
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-03
[patent_title] => 'Semiconductor diode and method of manufacture'
[patent_app_type] => utility
[patent_app_number] => 14/803365
[patent_app_country] => US
[patent_app_date] => 2015-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 11691
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14803365
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/803365 | Semiconductor diode and method of manufacture | Jul 19, 2015 | Issued |
Array
(
[id] => 13159779
[patent_doc_number] => 10096625
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-09
[patent_title] => Thin film transistor and flat display device
[patent_app_type] => utility
[patent_app_number] => 14/795327
[patent_app_country] => US
[patent_app_date] => 2015-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2905
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 377
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14795327
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/795327 | Thin film transistor and flat display device | Jul 8, 2015 | Issued |
Array
(
[id] => 11876488
[patent_doc_number] => 09748270
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-29
[patent_title] => 'Tunable capacitor for FDSOI applications'
[patent_app_type] => utility
[patent_app_number] => 14/750236
[patent_app_country] => US
[patent_app_date] => 2015-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6274
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14750236
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/750236 | Tunable capacitor for FDSOI applications | Jun 24, 2015 | Issued |
Array
(
[id] => 11467056
[patent_doc_number] => 09583700
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-28
[patent_title] => 'RRAM process with roughness tuning technology'
[patent_app_type] => utility
[patent_app_number] => 14/746703
[patent_app_country] => US
[patent_app_date] => 2015-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 17
[patent_no_of_words] => 4164
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14746703
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/746703 | RRAM process with roughness tuning technology | Jun 21, 2015 | Issued |
Array
(
[id] => 11687503
[patent_doc_number] => 09685553
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-20
[patent_title] => 'Generating tensile strain in bulk finFET channel'
[patent_app_type] => utility
[patent_app_number] => 14/745547
[patent_app_country] => US
[patent_app_date] => 2015-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 23
[patent_no_of_words] => 5554
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14745547
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/745547 | Generating tensile strain in bulk finFET channel | Jun 21, 2015 | Issued |
Array
(
[id] => 10402711
[patent_doc_number] => 20150287720
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-08
[patent_title] => 'DUAL TRENCH RECTIFIER AND METHOD FOR FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/746248
[patent_app_country] => US
[patent_app_date] => 2015-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 3830
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14746248
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/746248 | Dual trench rectifier and method for forming the same | Jun 21, 2015 | Issued |
Array
(
[id] => 11286748
[patent_doc_number] => 09502609
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-22
[patent_title] => 'Simplified process for vertical LED manufacturing'
[patent_app_type] => utility
[patent_app_number] => 14/744602
[patent_app_country] => US
[patent_app_date] => 2015-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 5303
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14744602
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/744602 | Simplified process for vertical LED manufacturing | Jun 18, 2015 | Issued |
Array
(
[id] => 11615714
[patent_doc_number] => 09653578
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-16
[patent_title] => 'Thin film transistor, its manufacturing method and display device'
[patent_app_type] => utility
[patent_app_number] => 14/744838
[patent_app_country] => US
[patent_app_date] => 2015-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 4913
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14744838
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/744838 | Thin film transistor, its manufacturing method and display device | Jun 18, 2015 | Issued |
Array
(
[id] => 11353632
[patent_doc_number] => 20160372372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-22
[patent_title] => 'BACKSIDE CONTACT TO FINAL SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 14/744681
[patent_app_country] => US
[patent_app_date] => 2015-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4895
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14744681
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/744681 | Backside contact to final substrate | Jun 18, 2015 | Issued |
Array
(
[id] => 11353804
[patent_doc_number] => 20160372544
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-22
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUITS (ICs) EMPLOYING LOCALIZED LOW DIELECTRIC CONSTANT (LOW-K) MATERIAL IN INTER-LAYER DIELECTRIC (ILD) MATERIAL FOR IMPROVED SPEED PERFORMANCE'
[patent_app_type] => utility
[patent_app_number] => 14/743143
[patent_app_country] => US
[patent_app_date] => 2015-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8081
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14743143
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/743143 | Semiconductor integrated circuits (ICs) employing localized low dielectric constant (low-K) material in inter-layer dielectric (ILD) material for improved speed performance | Jun 17, 2015 | Issued |
Array
(
[id] => 11207956
[patent_doc_number] => 09437588
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-09-06
[patent_title] => 'Middle of-line architecture for dense library layout using M0 hand-shake'
[patent_app_type] => utility
[patent_app_number] => 14/742935
[patent_app_country] => US
[patent_app_date] => 2015-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3661
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14742935
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/742935 | Middle of-line architecture for dense library layout using M0 hand-shake | Jun 17, 2015 | Issued |
Array
(
[id] => 11353819
[patent_doc_number] => 20160372559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-22
[patent_title] => 'FIN SHAPE CONTACTS AND METHODS FOR FORMING FIN SHAPE CONTACTS'
[patent_app_type] => utility
[patent_app_number] => 14/740872
[patent_app_country] => US
[patent_app_date] => 2015-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3381
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14740872
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/740872 | Fin shape contacts and methods for forming fin shape contacts | Jun 15, 2015 | Issued |
Array
(
[id] => 11339532
[patent_doc_number] => 20160365288
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-15
[patent_title] => 'DUMMY GATE USED AS INTERCONNECTION AND METHOD OF MAKING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/737551
[patent_app_country] => US
[patent_app_date] => 2015-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2911
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14737551
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/737551 | Dummy gate used as interconnection and method of making the same | Jun 11, 2015 | Issued |
Array
(
[id] => 11339756
[patent_doc_number] => 20160365512
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-15
[patent_title] => 'RRAM DEVICES AND METHODS'
[patent_app_type] => utility
[patent_app_number] => 14/737830
[patent_app_country] => US
[patent_app_date] => 2015-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5365
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14737830
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/737830 | RRAM devices and methods | Jun 11, 2015 | Issued |
Array
(
[id] => 10385288
[patent_doc_number] => 20150270295
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-24
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/730436
[patent_app_country] => US
[patent_app_date] => 2015-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 21387
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14730436
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/730436 | Semiconductor device | Jun 3, 2015 | Issued |
Array
(
[id] => 11321595
[patent_doc_number] => 09520343
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-12-13
[patent_title] => 'Field-effect transistor structure for preventing from shorting'
[patent_app_type] => utility
[patent_app_number] => 14/729588
[patent_app_country] => US
[patent_app_date] => 2015-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1313
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14729588
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/729588 | Field-effect transistor structure for preventing from shorting | Jun 2, 2015 | Issued |