Search

Edward J. Cain

Examiner (ID: 151, Phone: (571)272-1118 , Office: P/1762 )

Most Active Art Unit
1714
Art Unit(s)
1796, 1714, 1762, 1511, 1509, 0
Total Applications
3559
Issued Applications
2955
Pending Applications
148
Abandoned Applications
460

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20705976 [patent_doc_number] => 12628708 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-12 [patent_title] => Semiconductor package and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/752083 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 31 [patent_no_of_words] => 4236 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17752083 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/752083
Semiconductor package and method of manufacturing the same May 23, 2022 Issued
Array ( [id] => 18360090 [patent_doc_number] => 20230141681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => CMOS IMAGE SENSORS AND MANUFACTURING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 17/749333 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7785 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749333 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/749333
CMOS IMAGE SENSORS AND MANUFACTURING METHODS THEREOF May 19, 2022 Pending
Array ( [id] => 18789388 [patent_doc_number] => 20230378047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR DEVICE PACKAGES WITH ENHANCED THERMO-MECHANICAL RELIABILITY [patent_app_type] => utility [patent_app_number] => 17/747630 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747630 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/747630
SEMICONDUCTOR DEVICE PACKAGES WITH ENHANCED THERMO-MECHANICAL RELIABILITY May 17, 2022 Abandoned
Array ( [id] => 18757604 [patent_doc_number] => 20230361067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/735126 [patent_app_country] => US [patent_app_date] => 2022-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17735126 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/735126
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF May 2, 2022 Pending
Array ( [id] => 17780248 [patent_doc_number] => 20220246598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => Semiconductor Devices and Methods of Manufacture [patent_app_type] => utility [patent_app_number] => 17/726222 [patent_app_country] => US [patent_app_date] => 2022-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17726222 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/726222
Semiconductor Devices and Methods of Manufacture Apr 20, 2022 Pending
Array ( [id] => 18475548 [patent_doc_number] => 20230209836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/725013 [patent_app_country] => US [patent_app_date] => 2022-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17725013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/725013
Memory device and method for fabricating the same Apr 19, 2022 Issued
Array ( [id] => 18081111 [patent_doc_number] => 20220406723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => INTERPOSER VIA INTERCONNECT SHAPES WITH IMPROVED PERFORMANCE CHARACTERISTICS AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/723622 [patent_app_country] => US [patent_app_date] => 2022-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17723622 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/723622
INTERPOSER VIA INTERCONNECT SHAPES WITH IMPROVED PERFORMANCE CHARACTERISTICS AND METHODS OF FORMING THE SAME Apr 18, 2022 Pending
Array ( [id] => 18680019 [patent_doc_number] => 20230317677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) (3DIC) PACKAGE EMPLOYING A REDISTRIBUTION LAYER (RDL) INTERPOSER FACILITATING SEMICONDUCTOR DIE STACKING, AND RELATED FABRICATION METHODS [patent_app_type] => utility [patent_app_number] => 17/657760 [patent_app_country] => US [patent_app_date] => 2022-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17657760 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/657760
THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT (IC) (3DIC) PACKAGE EMPLOYING A REDISTRIBUTION LAYER (RDL) INTERPOSER FACILITATING SEMICONDUCTOR DIE STACKING, AND RELATED FABRICATION METHODS Apr 3, 2022 Pending
Array ( [id] => 19414875 [patent_doc_number] => 12080712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/712272 [patent_app_country] => US [patent_app_date] => 2022-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 6955 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17712272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/712272
Semiconductor device Apr 3, 2022 Issued
Array ( [id] => 18177684 [patent_doc_number] => 20230038413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING HEAT DISSIPATION STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/702440 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702440 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/702440
Semiconductor package including heat dissipation structure Mar 22, 2022 Issued
Array ( [id] => 18113091 [patent_doc_number] => 20230005971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => IMAGE SENSOR AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/693069 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693069 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/693069
Image sensor and method of fabricating the same Mar 10, 2022 Issued
Array ( [id] => 17676734 [patent_doc_number] => 20220189901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MULTI-SIDE POWER DELIVERY IN STACKED MEMORY PACKAGING [patent_app_type] => utility [patent_app_number] => 17/687220 [patent_app_country] => US [patent_app_date] => 2022-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17687220 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/687220
MULTI-SIDE POWER DELIVERY IN STACKED MEMORY PACKAGING Mar 3, 2022 Pending
Array ( [id] => 18585995 [patent_doc_number] => 20230268260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/679052 [patent_app_country] => US [patent_app_date] => 2022-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/679052
Package structure and method of fabricating the same Feb 22, 2022 Issued
Array ( [id] => 18219686 [patent_doc_number] => 11594636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Source/drain structure [patent_app_type] => utility [patent_app_number] => 17/651437 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 11325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651437 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651437
Source/drain structure Feb 16, 2022 Issued
Array ( [id] => 17780245 [patent_doc_number] => 20220246595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/591408 [patent_app_country] => US [patent_app_date] => 2022-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17591408 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/591408
Semiconductor device and a method of manufacturing a semiconductor device Feb 1, 2022 Issued
Array ( [id] => 18661328 [patent_doc_number] => 20230307341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => PACKAGING ARCHITECTURE WITH EDGE RING ANCHORING [patent_app_type] => utility [patent_app_number] => 17/583485 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17583485 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/583485
PACKAGING ARCHITECTURE WITH EDGE RING ANCHORING Jan 24, 2022 Pending
Array ( [id] => 18874827 [patent_doc_number] => 11862650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Wave guide filter for semiconductor imaging devices [patent_app_type] => utility [patent_app_number] => 17/579030 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 10446 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579030 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579030
Wave guide filter for semiconductor imaging devices Jan 18, 2022 Issued
Array ( [id] => 18514648 [patent_doc_number] => 20230230908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => PACKAGE COMPRISING A SUBSTRATE WITH POST INTERCONNECTS AND A SOLDER RESIST LAYER HAVING A CAVITY [patent_app_type] => utility [patent_app_number] => 17/579434 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16276 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579434 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579434
PACKAGE COMPRISING A SUBSTRATE WITH POST INTERCONNECTS AND A SOLDER RESIST LAYER HAVING A CAVITY Jan 18, 2022 Pending
Array ( [id] => 18292504 [patent_doc_number] => 11621377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => LED and phosphor combinations for high luminous efficacy lighting with superior color control [patent_app_type] => utility [patent_app_number] => 17/576757 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 45 [patent_no_of_words] => 5873 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17576757 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/576757
LED and phosphor combinations for high luminous efficacy lighting with superior color control Jan 13, 2022 Issued
Array ( [id] => 18160084 [patent_doc_number] => 20230026676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF FORMATION [patent_app_type] => utility [patent_app_number] => 17/570710 [patent_app_country] => US [patent_app_date] => 2022-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12103 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17570710 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/570710
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF FORMATION Jan 6, 2022 Pending
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