Search

Edward J. Dudek Jr.

Examiner (ID: 15510, Phone: (571)270-1030 , Office: P/2136 )

Most Active Art Unit
2136
Art Unit(s)
2132, 2186, 2136
Total Applications
1288
Issued Applications
1108
Pending Applications
84
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16209066 [patent_doc_number] => 20200242056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/570315 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570315 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570315
Memory system Sep 12, 2019 Issued
Array ( [id] => 16116113 [patent_doc_number] => 20200210079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => POWER MANAGEMENT INTEGRATED CIRCUIT CHIPS, SOLID-STATE DRIVES INCLUDING THE SAME, AND SOLID-STATE DRIVE POWER-MODE CONTROL METHODS [patent_app_type] => utility [patent_app_number] => 16/562962 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9162 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562962 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/562962
Power management integrated circuit chips, solid-state drives including the same, and solid-state drive power-mode control methods Sep 5, 2019 Issued
Array ( [id] => 16772623 [patent_doc_number] => 10983727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Determination of data integrity based on sentinel cells [patent_app_type] => utility [patent_app_number] => 16/557245 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4970 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557245 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557245
Determination of data integrity based on sentinel cells Aug 29, 2019 Issued
Array ( [id] => 16864646 [patent_doc_number] => 11023388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Data path protection parity determination for data patterns in storage devices [patent_app_type] => utility [patent_app_number] => 16/549523 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549523 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/549523
Data path protection parity determination for data patterns in storage devices Aug 22, 2019 Issued
Array ( [id] => 16659329 [patent_doc_number] => 20210055966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => ALLOCATION SCHEMA FOR A SCALABLE MEMORY AREA [patent_app_type] => utility [patent_app_number] => 16/549218 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549218 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/549218
Allocation schema for a scalable memory area Aug 22, 2019 Issued
Array ( [id] => 16659246 [patent_doc_number] => 20210055883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => Cache Memory with Transient Storage for Cache Lines [patent_app_type] => utility [patent_app_number] => 16/548784 [patent_app_country] => US [patent_app_date] => 2019-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5640 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16548784 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/548784
Cache memory with transient storage for cache lines Aug 21, 2019 Issued
Array ( [id] => 15257531 [patent_doc_number] => 20190377499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => OPTIMIZED PERFORMANCE THROUGH LEVERAGING APPROPRIATE DISK SECTORS FOR DEFRAGMENTATION IN AN ERASURE CODED HETEROGENEOUS OBJECT STORAGE CLOUD [patent_app_type] => utility [patent_app_number] => 16/546816 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6819 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16546816 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/546816
Optimized performance through leveraging appropriate disk sectors for defragmentation in an erasure coded heterogeneous object storage cloud Aug 20, 2019 Issued
Array ( [id] => 16095551 [patent_doc_number] => 20200201762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => STORAGE DEVICE AND STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/547410 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10740 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547410 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/547410
Storage device and storage system Aug 20, 2019 Issued
Array ( [id] => 16659387 [patent_doc_number] => 20210056024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => MANAGING SERIAL MISS REQUESTS FOR LOAD OPERATIONS IN A NON-COHERENT MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/545521 [patent_app_country] => US [patent_app_date] => 2019-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10269 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16545521 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/545521
Managing serial miss requests for load operations in a non-coherent memory system Aug 19, 2019 Issued
Array ( [id] => 15214997 [patent_doc_number] => 20190370185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => Systems and Methods for Identifying Storage Resources That Are Not In Use [patent_app_type] => utility [patent_app_number] => 16/543464 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543464 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543464
Systems and methods for identifying storage resources that are not in use Aug 15, 2019 Issued
Array ( [id] => 18204513 [patent_doc_number] => 11586910 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-02-21 [patent_title] => Write cache for neural network inference circuit [patent_app_type] => utility [patent_app_number] => 16/537478 [patent_app_country] => US [patent_app_date] => 2019-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 31450 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16537478 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/537478
Write cache for neural network inference circuit Aug 8, 2019 Issued
Array ( [id] => 16623395 [patent_doc_number] => 20210042048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => DISTRIBUTION FROM MULTIPLE SERVERS TO MULTIPLE NODES [patent_app_type] => utility [patent_app_number] => 16/533629 [patent_app_country] => US [patent_app_date] => 2019-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533629 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533629
Distribution from multiple servers to multiple nodes Aug 5, 2019 Issued
Array ( [id] => 16879941 [patent_doc_number] => 11030090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Adaptive data migration [patent_app_type] => utility [patent_app_number] => 16/524491 [patent_app_country] => US [patent_app_date] => 2019-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12285 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16524491 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/524491
Adaptive data migration Jul 28, 2019 Issued
Array ( [id] => 17394815 [patent_doc_number] => 11243829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => Metadata management in data storage systems [patent_app_type] => utility [patent_app_number] => 16/521746 [patent_app_country] => US [patent_app_date] => 2019-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5730 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521746 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521746
Metadata management in data storage systems Jul 24, 2019 Issued
Array ( [id] => 15090631 [patent_doc_number] => 20190340126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => TABLE OF CONTENTS CACHE ENTRY HAVING A POINTER FOR A RANGE OF ADDRESSES [patent_app_type] => utility [patent_app_number] => 16/515697 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16515697 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/515697
Table of contents cache entry having a pointer for a range of addresses Jul 17, 2019 Issued
Array ( [id] => 17187109 [patent_doc_number] => 20210333994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => METHOD FOR AGGREGATION OPTIMIZATION OF TIME SERIES DATA [patent_app_type] => utility [patent_app_number] => 17/265284 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2649 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17265284 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/265284
Method for aggregation optimization of time series data Jul 17, 2019 Issued
Array ( [id] => 16737730 [patent_doc_number] => 10963382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Table of contents cache entry having a pointer for a range of addresses [patent_app_type] => utility [patent_app_number] => 16/515739 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 44 [patent_no_of_words] => 16895 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16515739 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/515739
Table of contents cache entry having a pointer for a range of addresses Jul 17, 2019 Issued
Array ( [id] => 16652126 [patent_doc_number] => 10929307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Memory tagging for sensitive data redaction in memory dump [patent_app_type] => utility [patent_app_number] => 16/515141 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4907 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16515141 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/515141
Memory tagging for sensitive data redaction in memory dump Jul 17, 2019 Issued
Array ( [id] => 16833834 [patent_doc_number] => 11010085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Apparatuses and methods for data movement [patent_app_type] => utility [patent_app_number] => 16/506664 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 21352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506664 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506664
Apparatuses and methods for data movement Jul 8, 2019 Issued
Array ( [id] => 16559011 [patent_doc_number] => 20210004160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => PREFETCHING DATA BLOCKS FROM A PRIMARY STORAGE TO A SECONDARY STORAGE SYSTEM WHILE DATA IS BEING SYNCHRONIZED BETWEEN THE PRIMARY STORAGE AND SECONDARY STORAGE [patent_app_type] => utility [patent_app_number] => 16/460960 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460960 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/460960
Prefetching data blocks from a primary storage to a secondary storage system while data is being synchronized between the primary storage and secondary storage Jul 1, 2019 Issued
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