
Edward J. Dudek Jr.
Examiner (ID: 15510, Phone: (571)270-1030 , Office: P/2136 )
| Most Active Art Unit | 2136 |
| Art Unit(s) | 2132, 2186, 2136 |
| Total Applications | 1288 |
| Issued Applications | 1108 |
| Pending Applications | 84 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11116946
[patent_doc_number] => 20160313920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-27
[patent_title] => 'SYSTEM AND METHOD FOR AN ACCELERATOR CACHE AND PHYSICAL STORAGE TIER'
[patent_app_type] => utility
[patent_app_number] => 15/200456
[patent_app_country] => US
[patent_app_date] => 2016-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 11020
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15200456
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/200456 | System and method for an accelerator cache and physical storage tier | Jun 30, 2016 | Issued |
Array
(
[id] => 11315124
[patent_doc_number] => 20160351234
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-01
[patent_title] => 'Integrated circute with multiple request ports and link calibration support'
[patent_app_type] => utility
[patent_app_number] => 15/169331
[patent_app_country] => US
[patent_app_date] => 2016-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 21518
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169331
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/169331 | Memory controller integrated circuit with multiple request ports and link calibration support | May 30, 2016 | Issued |
Array
(
[id] => 12039343
[patent_doc_number] => 09817575
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-14
[patent_title] => 'Host interface controller and control method for storage device'
[patent_app_type] => utility
[patent_app_number] => 15/160803
[patent_app_country] => US
[patent_app_date] => 2016-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4927
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160803
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/160803 | Host interface controller and control method for storage device | May 19, 2016 | Issued |
Array
(
[id] => 12039343
[patent_doc_number] => 09817575
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-14
[patent_title] => 'Host interface controller and control method for storage device'
[patent_app_type] => utility
[patent_app_number] => 15/160803
[patent_app_country] => US
[patent_app_date] => 2016-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4927
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160803
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/160803 | Host interface controller and control method for storage device | May 19, 2016 | Issued |
Array
(
[id] => 12039343
[patent_doc_number] => 09817575
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-14
[patent_title] => 'Host interface controller and control method for storage device'
[patent_app_type] => utility
[patent_app_number] => 15/160803
[patent_app_country] => US
[patent_app_date] => 2016-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4927
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160803
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/160803 | Host interface controller and control method for storage device | May 19, 2016 | Issued |
Array
(
[id] => 12213791
[patent_doc_number] => 09910598
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-06
[patent_title] => 'Host interface controller and control method for storage device'
[patent_app_type] => utility
[patent_app_number] => 15/160682
[patent_app_country] => US
[patent_app_date] => 2016-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4746
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160682
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/160682 | Host interface controller and control method for storage device | May 19, 2016 | Issued |
Array
(
[id] => 12570849
[patent_doc_number] => 10019199
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-10
[patent_title] => Controller coupled to semiconductor memory device and operating method thereof
[patent_app_type] => utility
[patent_app_number] => 15/160782
[patent_app_country] => US
[patent_app_date] => 2016-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 9774
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160782
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/160782 | Controller coupled to semiconductor memory device and operating method thereof | May 19, 2016 | Issued |
Array
(
[id] => 12039343
[patent_doc_number] => 09817575
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-14
[patent_title] => 'Host interface controller and control method for storage device'
[patent_app_type] => utility
[patent_app_number] => 15/160803
[patent_app_country] => US
[patent_app_date] => 2016-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4927
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160803
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/160803 | Host interface controller and control method for storage device | May 19, 2016 | Issued |
Array
(
[id] => 12494940
[patent_doc_number] => 09996263
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-06-12
[patent_title] => System and method of a shared memory hash table with notifications
[patent_app_type] => utility
[patent_app_number] => 15/152494
[patent_app_country] => US
[patent_app_date] => 2016-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 21
[patent_no_of_words] => 12731
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152494
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/152494 | System and method of a shared memory hash table with notifications | May 10, 2016 | Issued |
Array
(
[id] => 11651339
[patent_doc_number] => 20170147239
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-25
[patent_title] => 'MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 15/144435
[patent_app_country] => US
[patent_app_date] => 2016-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 12998
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144435
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/144435 | Memory system and operating method of memory system | May 1, 2016 | Issued |
Array
(
[id] => 12249006
[patent_doc_number] => 09921780
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-20
[patent_title] => 'Memory system and operating method thereof'
[patent_app_type] => utility
[patent_app_number] => 15/144451
[patent_app_country] => US
[patent_app_date] => 2016-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 15257
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144451
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/144451 | Memory system and operating method thereof | May 1, 2016 | Issued |
Array
(
[id] => 12433266
[patent_doc_number] => 09977603
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-22
[patent_title] => Memory devices for detecting known initial states and related methods and electronic systems
[patent_app_type] => utility
[patent_app_number] => 15/144141
[patent_app_country] => US
[patent_app_date] => 2016-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 6035
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144141
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/144141 | Memory devices for detecting known initial states and related methods and electronic systems | May 1, 2016 | Issued |
Array
(
[id] => 15313293
[patent_doc_number] => 10521352
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-31
[patent_title] => Memory system and operating method of memory system
[patent_app_type] => utility
[patent_app_number] => 15/144377
[patent_app_country] => US
[patent_app_date] => 2016-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 14025
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144377
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/144377 | Memory system and operating method of memory system | May 1, 2016 | Issued |
Array
(
[id] => 12532281
[patent_doc_number] => 10007615
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-06-26
[patent_title] => Methods and apparatus for performing fast caching
[patent_app_type] => utility
[patent_app_number] => 15/144519
[patent_app_country] => US
[patent_app_date] => 2016-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4837
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144519
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/144519 | Methods and apparatus for performing fast caching | May 1, 2016 | Issued |
Array
(
[id] => 12550890
[patent_doc_number] => 10013178
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-03
[patent_title] => Methods, systems and computer readable media for optimizing storage device bus and resource utilization by host realignment
[patent_app_type] => utility
[patent_app_number] => 15/143538
[patent_app_country] => US
[patent_app_date] => 2016-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4359
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15143538
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/143538 | Methods, systems and computer readable media for optimizing storage device bus and resource utilization by host realignment | Apr 29, 2016 | Issued |
Array
(
[id] => 12025641
[patent_doc_number] => 20170315740
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-02
[patent_title] => 'TECHNIQUE FOR PACING AND BALANCING PROCESSING OF INTERNAL AND EXTERNAL I/O REQUESTS IN A STORAGE SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 15/143324
[patent_app_country] => US
[patent_app_date] => 2016-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 15810
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15143324
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/143324 | TECHNIQUE FOR PACING AND BALANCING PROCESSING OF INTERNAL AND EXTERNAL I/O REQUESTS IN A STORAGE SYSTEM | Apr 28, 2016 | Abandoned |
Array
(
[id] => 11124004
[patent_doc_number] => 20160320978
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-03
[patent_title] => 'MANAGEMENT OF WRITABLE SNAPSHOTS IN A NETWORK STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/143296
[patent_app_country] => US
[patent_app_date] => 2016-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8108
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15143296
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/143296 | Management of writable snapshots in a network storage device | Apr 28, 2016 | Issued |
Array
(
[id] => 11027489
[patent_doc_number] => 20160224445
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-08-04
[patent_title] => 'SIZING A WRITE CACHE BUFFER BASED ON EMERGENCY DATA SAVE PARAMETERS'
[patent_app_type] => utility
[patent_app_number] => 15/135759
[patent_app_country] => US
[patent_app_date] => 2016-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5747
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15135759
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/135759 | Sizing a write cache buffer based on emergency data save parameters | Apr 21, 2016 | Issued |
Array
(
[id] => 11109582
[patent_doc_number] => 20160306552
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-20
[patent_title] => 'LOW WRITE AMPLIFICATION IN SOLID STATE DRIVE'
[patent_app_type] => utility
[patent_app_number] => 15/130792
[patent_app_country] => US
[patent_app_date] => 2016-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8600
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15130792
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/130792 | Low write amplification in solid state drive | Apr 14, 2016 | Issued |
Array
(
[id] => 12571338
[patent_doc_number] => 10019365
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-10
[patent_title] => Adaptive value range profiling for enhanced system performance
[patent_app_type] => utility
[patent_app_number] => 15/130793
[patent_app_country] => US
[patent_app_date] => 2016-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 7174
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 316
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15130793
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/130793 | Adaptive value range profiling for enhanced system performance | Apr 14, 2016 | Issued |