Search

Edward J. Dudek Jr.

Examiner (ID: 1920, Phone: (571)270-1030 , Office: P/2136 )

Most Active Art Unit
2136
Art Unit(s)
2136, 2186, 2132
Total Applications
1290
Issued Applications
1109
Pending Applications
84
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8667488 [patent_doc_number] => 08380961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Methods and systems for formatting storage volumes' [patent_app_type] => utility [patent_app_number] => 12/859134 [patent_app_country] => US [patent_app_date] => 2010-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4844 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12859134 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/859134
Methods and systems for formatting storage volumes Aug 17, 2010 Issued
Array ( [id] => 7785774 [patent_doc_number] => 20120047330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'I/O EFFICIENCY OF PERSISTENT CACHES IN A STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/858974 [patent_app_country] => US [patent_app_date] => 2010-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4648 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20120047330.pdf [firstpage_image] =>[orig_patent_app_number] => 12858974 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/858974
I/O EFFICIENCY OF PERSISTENT CACHES IN A STORAGE SYSTEM Aug 17, 2010 Abandoned
Array ( [id] => 9102629 [patent_doc_number] => 08566523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Multi-processor and apparatus and method for managing cache coherence of the same' [patent_app_type] => utility [patent_app_number] => 12/858571 [patent_app_country] => US [patent_app_date] => 2010-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8065 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12858571 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/858571
Multi-processor and apparatus and method for managing cache coherence of the same Aug 17, 2010 Issued
Array ( [id] => 8693117 [patent_doc_number] => 08392653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Methods and systems for releasing and re-allocating storage segments in a storage volume' [patent_app_type] => utility [patent_app_number] => 12/859137 [patent_app_country] => US [patent_app_date] => 2010-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3666 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12859137 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/859137
Methods and systems for releasing and re-allocating storage segments in a storage volume Aug 17, 2010 Issued
Array ( [id] => 7785788 [patent_doc_number] => 20120047344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'METHODS AND APPARATUSES FOR RE-ORDERING DATA' [patent_app_type] => utility [patent_app_number] => 12/857923 [patent_app_country] => US [patent_app_date] => 2010-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4324 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20120047344.pdf [firstpage_image] =>[orig_patent_app_number] => 12857923 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/857923
METHODS AND APPARATUSES FOR RE-ORDERING DATA Aug 16, 2010 Abandoned
Array ( [id] => 7785786 [patent_doc_number] => 20120047342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'FACILITATION OF SIMULTANEOUS STORAGE INITIALIZATION AND DATA DESTAGE' [patent_app_type] => utility [patent_app_number] => 12/857735 [patent_app_country] => US [patent_app_date] => 2010-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6188 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20120047342.pdf [firstpage_image] =>[orig_patent_app_number] => 12857735 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/857735
Facilitation of simultaneous storage initialization and data destage Aug 16, 2010 Issued
Array ( [id] => 7785755 [patent_doc_number] => 20120047311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'METHOD AND SYSTEM OF HANDLING NON-ALIGNED MEMORY ACCESSES' [patent_app_type] => utility [patent_app_number] => 12/857933 [patent_app_country] => US [patent_app_date] => 2010-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5718 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20120047311.pdf [firstpage_image] =>[orig_patent_app_number] => 12857933 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/857933
Method and system of handling non-aligned memory accesses Aug 16, 2010 Issued
Array ( [id] => 8849240 [patent_doc_number] => 08458440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Deferred complete virtual address computation for local memory space requests' [patent_app_type] => utility [patent_app_number] => 12/858362 [patent_app_country] => US [patent_app_date] => 2010-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9882 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12858362 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/858362
Deferred complete virtual address computation for local memory space requests Aug 16, 2010 Issued
Array ( [id] => 4488081 [patent_doc_number] => 07908429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-15 [patent_title] => 'Apparatus and method of page program operation for memory devices with mirror back-up of data' [patent_app_type] => utility [patent_app_number] => 12/832121 [patent_app_country] => US [patent_app_date] => 2010-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12544 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/908/07908429.pdf [firstpage_image] =>[orig_patent_app_number] => 12832121 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/832121
Apparatus and method of page program operation for memory devices with mirror back-up of data Jul 7, 2010 Issued
Array ( [id] => 8752068 [patent_doc_number] => 08417911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Associating input/output device requests with memory associated with a logical partition' [patent_app_type] => utility [patent_app_number] => 12/821224 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3655 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821224 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821224
Associating input/output device requests with memory associated with a logical partition Jun 22, 2010 Issued
Array ( [id] => 8872910 [patent_doc_number] => 08468297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Content addressable memory system' [patent_app_type] => utility [patent_app_number] => 12/821258 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6215 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821258 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821258
Content addressable memory system Jun 22, 2010 Issued
Array ( [id] => 7671468 [patent_doc_number] => 20110320737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'Main Memory Operations In A Symmetric Multiprocessing Computer' [patent_app_type] => utility [patent_app_number] => 12/821540 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8759 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821540 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/821540
Main memory operations in a symmetric multiprocessing computer Jun 22, 2010 Issued
Array ( [id] => 8378235 [patent_doc_number] => 08261039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Memory controllers, methods, and systems supporting multiple memory modes' [patent_app_type] => utility [patent_app_number] => 12/820973 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 33 [patent_no_of_words] => 21265 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12820973 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/820973
Memory controllers, methods, and systems supporting multiple memory modes Jun 21, 2010 Issued
Array ( [id] => 9458491 [patent_doc_number] => 08719515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Composition of locks in software transactional memory' [patent_app_type] => utility [patent_app_number] => 12/819499 [patent_app_country] => US [patent_app_date] => 2010-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9083 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12819499 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/819499
Composition of locks in software transactional memory Jun 20, 2010 Issued
Array ( [id] => 8716075 [patent_doc_number] => 08402226 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-03-19 [patent_title] => 'Rate proportional cache write-back in a storage server' [patent_app_type] => utility [patent_app_number] => 12/818577 [patent_app_country] => US [patent_app_date] => 2010-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 12828 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12818577 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/818577
Rate proportional cache write-back in a storage server Jun 17, 2010 Issued
Array ( [id] => 7562910 [patent_doc_number] => 20110276744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'FLASH MEMORY CACHE INCLUDING FOR USE WITH PERSISTENT KEY-VALUE STORE' [patent_app_type] => utility [patent_app_number] => 12/773859 [patent_app_country] => US [patent_app_date] => 2010-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10107 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20110276744.pdf [firstpage_image] =>[orig_patent_app_number] => 12773859 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/773859
FLASH MEMORY CACHE INCLUDING FOR USE WITH PERSISTENT KEY-VALUE STORE May 4, 2010 Abandoned
Array ( [id] => 8530569 [patent_doc_number] => 08307153 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Power efficient and rule movement optimized TCAM management' [patent_app_type] => utility [patent_app_number] => 12/774032 [patent_app_country] => US [patent_app_date] => 2010-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7873 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12774032 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/774032
Power efficient and rule movement optimized TCAM management May 4, 2010 Issued
Array ( [id] => 7562932 [patent_doc_number] => 20110276766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'CONFIGURABLE MEMORY CONTROLLER' [patent_app_type] => utility [patent_app_number] => 12/774462 [patent_app_country] => US [patent_app_date] => 2010-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12902 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20110276766.pdf [firstpage_image] =>[orig_patent_app_number] => 12774462 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/774462
CONFIGURABLE MEMORY CONTROLLER May 4, 2010 Abandoned
Array ( [id] => 8552187 [patent_doc_number] => 08327085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'Characterizing multiple resource utilization using a relationship model to optimize memory utilization in a virtual machine environment' [patent_app_type] => utility [patent_app_number] => 12/774352 [patent_app_country] => US [patent_app_date] => 2010-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4157 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12774352 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/774352
Characterizing multiple resource utilization using a relationship model to optimize memory utilization in a virtual machine environment May 4, 2010 Issued
Array ( [id] => 8449088 [patent_doc_number] => 08291155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Data access method, memory controller and memory storage system' [patent_app_type] => utility [patent_app_number] => 12/773475 [patent_app_country] => US [patent_app_date] => 2010-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 10676 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12773475 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/773475
Data access method, memory controller and memory storage system May 3, 2010 Issued
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