Search

Edward K. Look

Examiner (ID: 18842)

Most Active Art Unit
3401
Art Unit(s)
3400, 3405, 3745, 3401, 3403
Total Applications
1139
Issued Applications
925
Pending Applications
23
Abandoned Applications
192

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20071143 [patent_doc_number] => 20250209365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => IDENTIFYING A DYNAMICAL DECOUPLING SEQUENCE FOR ERROR SUPPRESSION OF QUANTUM COMPUTATIONS USING A GENETIC ALGORITHM [patent_app_type] => utility [patent_app_number] => 18/395820 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395820 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395820
IDENTIFYING A DYNAMICAL DECOUPLING SEQUENCE FOR ERROR SUPPRESSION OF QUANTUM COMPUTATIONS USING A GENETIC ALGORITHM Dec 25, 2023 Pending
Array ( [id] => 19253805 [patent_doc_number] => 20240204802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => EARLY EXIT ERROR-LOCATOR POLYNOMIAL DETERMINATION [patent_app_type] => utility [patent_app_number] => 18/541990 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18541990 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/541990
EARLY EXIT ERROR-LOCATOR POLYNOMIAL DETERMINATION Dec 14, 2023 Pending
Array ( [id] => 20190245 [patent_doc_number] => 12401377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Error correction based on asymmetric ratio [patent_app_type] => utility [patent_app_number] => 18/540595 [patent_app_country] => US [patent_app_date] => 2023-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4086 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18540595 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/540595
Error correction based on asymmetric ratio Dec 13, 2023 Issued
Array ( [id] => 20062194 [patent_doc_number] => 20250200416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => METHOD AND APPARATUS FOR QUANTUM-CLASSICAL RESOURCE BALANCING OPTIMIZATIONS [patent_app_type] => utility [patent_app_number] => 18/539044 [patent_app_country] => US [patent_app_date] => 2023-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18539044 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/539044
METHOD AND APPARATUS FOR QUANTUM-CLASSICAL RESOURCE BALANCING OPTIMIZATIONS Dec 12, 2023 Pending
Array ( [id] => 19972908 [patent_doc_number] => 12341533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Method and device for polar code encoding and decoding [patent_app_type] => utility [patent_app_number] => 18/537459 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 8639 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18537459 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/537459
Method and device for polar code encoding and decoding Dec 11, 2023 Issued
Array ( [id] => 20052760 [patent_doc_number] => 20250190982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => SYSTEMS AND METHODS FOR HEALTH ANALYSIS OF A MODELED SOFTWARE SYSTEM [patent_app_type] => utility [patent_app_number] => 18/533745 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6584 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18533745 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/533745
Systems and methods for health analysis of a modeled software system Dec 7, 2023 Issued
Array ( [id] => 19917109 [patent_doc_number] => 12292473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Yield improvements for three-dimensionally stacked neural network accelerators [patent_app_type] => utility [patent_app_number] => 18/527902 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2162 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527902 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527902
Yield improvements for three-dimensionally stacked neural network accelerators Dec 3, 2023 Issued
Array ( [id] => 20266233 [patent_doc_number] => 12437226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Probabalistic amplification and attenuation of quantum errors using a single dataset [patent_app_type] => utility [patent_app_number] => 18/512678 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11831 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512678 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512678
Probabalistic amplification and attenuation of quantum errors using a single dataset Nov 16, 2023 Issued
Array ( [id] => 19171959 [patent_doc_number] => 20240157933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => ACCELERATION OF S-POLAR ECC THROUGHPUT BY SCHEDULER [patent_app_type] => utility [patent_app_number] => 18/511690 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 483 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511690 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/511690
Acceleration of S-polar ECC throughput by scheduler Nov 15, 2023 Issued
Array ( [id] => 20132791 [patent_doc_number] => 12375109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Integration of compression algorithms with error correction codes [patent_app_type] => utility [patent_app_number] => 18/498832 [patent_app_country] => US [patent_app_date] => 2023-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3225 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18498832 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/498832
Integration of compression algorithms with error correction codes Oct 30, 2023 Issued
Array ( [id] => 20001268 [patent_doc_number] => 20250139490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => ERROR CORRECTION ON QUANTUM DEVICES [patent_app_type] => utility [patent_app_number] => 18/497903 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4979 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497903 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497903
ERROR CORRECTION ON QUANTUM DEVICES Oct 29, 2023 Abandoned
Array ( [id] => 19055739 [patent_doc_number] => 20240097708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => Partial Speed Changes To Improve In-Order Transfer [patent_app_type] => utility [patent_app_number] => 18/383813 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5419 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18383813 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/383813
Partial speed changes to improve in-order transfer Oct 24, 2023 Issued
Array ( [id] => 20003372 [patent_doc_number] => 20250141594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => POWER SAVING USING PREDICTIONS RELATED TO LOW DENSITY PARITY CHECK DECODING SUCCESS [patent_app_type] => utility [patent_app_number] => 18/494386 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10612 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18494386 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/494386
Power saving using predictions related to low density parity check decoding success Oct 24, 2023 Issued
Array ( [id] => 19176946 [patent_doc_number] => 20240162920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => PMD-TO-TC-MAC INTERFACE WITH 2-STAGE FEC PROTECTION [patent_app_type] => utility [patent_app_number] => 18/493579 [patent_app_country] => US [patent_app_date] => 2023-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7801 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18493579 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/493579
PMD-TO-TC-MAC INTERFACE WITH 2-STAGE FEC PROTECTION Oct 23, 2023 Abandoned
Array ( [id] => 18944423 [patent_doc_number] => 20240039562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => ANALOG ERROR DETECTION AND CORRECTION IN ANALOG IN-MEMORY CROSSBARS [patent_app_type] => utility [patent_app_number] => 18/482964 [patent_app_country] => US [patent_app_date] => 2023-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482964 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/482964
Analog error detection and correction in analog in-memory crossbars Oct 8, 2023 Issued
Array ( [id] => 18927931 [patent_doc_number] => 20240030935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => ENCODING AND DECODING APPARATUSES AND METHODS FOR IMPLEMENTING MULTI-MODE CODING [patent_app_type] => utility [patent_app_number] => 18/480261 [patent_app_country] => US [patent_app_date] => 2023-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16545 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480261 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/480261
Encoding and decoding apparatuses and methods for implementing multi-mode coding Oct 2, 2023 Issued
Array ( [id] => 20468659 [patent_doc_number] => 12524699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Selecting decoder used at quantum computing device [patent_app_type] => utility [patent_app_number] => 18/476055 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 5578 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476055 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/476055
Selecting decoder used at quantum computing device Sep 26, 2023 Issued
Array ( [id] => 19283641 [patent_doc_number] => 20240220117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => MEMORY DEVICE, MEMORY DEVICE TEST METHOD, AND TEST SYSTEM [patent_app_type] => utility [patent_app_number] => 18/467959 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18467959 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/467959
Memory device, memory device test method, and test system Sep 14, 2023 Issued
Array ( [id] => 18810614 [patent_doc_number] => 20230384949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => STORAGE SYSTEM HAVING A HOST THAT MANAGES PHYSICAL DATA LOCATIONS OF A STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/449647 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18449647 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/449647
Storage system having a host that manages physical data locations of a storage device Aug 13, 2023 Issued
Array ( [id] => 19275910 [patent_doc_number] => 12026038 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Memory controller with error detection and retry modes of operation [patent_app_type] => utility [patent_app_number] => 18/449118 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 11793 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18449118 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/449118
Memory controller with error detection and retry modes of operation Aug 13, 2023 Issued
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