Search

Edward P. Westin

Examiner (ID: 3586)

Most Active Art Unit
2505
Art Unit(s)
2509, 2505, 2878, 2607, 2800, 2506
Total Applications
801
Issued Applications
687
Pending Applications
2
Abandoned Applications
112

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18423667 [patent_doc_number] => 20230178131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => Free-layer Design for a Voltage Control of Magnetic Anisotropy Magnetic Random Access Memory Device [patent_app_type] => utility [patent_app_number] => 18/062785 [patent_app_country] => US [patent_app_date] => 2022-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18062785 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/062785
Free-layer design for a voltage control of magnetic anisotropy magnetic random access memory device Dec 6, 2022 Issued
Array ( [id] => 18945702 [patent_doc_number] => 20240040841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/977445 [patent_app_country] => US [patent_app_date] => 2022-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17977445 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/977445
DISPLAY PANEL AND DISPLAY DEVICE Oct 30, 2022 Pending
Array ( [id] => 19146520 [patent_doc_number] => 20240145550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => CARBON-CONTAINING CAP LAYER FOR DOPED SEMICONDUCTOR EPITAXIAL LAYER [patent_app_type] => utility [patent_app_number] => 17/975377 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5969 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17975377 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/975377
CARBON-CONTAINING CAP LAYER FOR DOPED SEMICONDUCTOR EPITAXIAL LAYER Oct 26, 2022 Pending
Array ( [id] => 18164555 [patent_doc_number] => 20230031151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/966034 [patent_app_country] => US [patent_app_date] => 2022-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17966034 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/966034
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Oct 13, 2022 Pending
Array ( [id] => 18278953 [patent_doc_number] => 20230094425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATION METHOD [patent_app_type] => utility [patent_app_number] => 17/956018 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5946 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956018 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956018
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATION METHOD Sep 28, 2022 Pending
Array ( [id] => 18280005 [patent_doc_number] => 20230095477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/947585 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17947585 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/947585
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Sep 18, 2022 Pending
Array ( [id] => 19007757 [patent_doc_number] => 20240071828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => METHODS OF SEPARATING SEMICONDUCTOR DIES [patent_app_type] => utility [patent_app_number] => 17/823797 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -40 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823797 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/823797
METHODS OF SEPARATING SEMICONDUCTOR DIES Aug 30, 2022 Pending
Array ( [id] => 19008063 [patent_doc_number] => 20240072134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => Placeholder Profile for Backside Self-Aligned Contact [patent_app_type] => utility [patent_app_number] => 17/899174 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899174 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899174
Placeholder Profile for Backside Self-Aligned Contact Aug 29, 2022 Pending
Array ( [id] => 19004914 [patent_doc_number] => 20240068985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SEMICONDUCTOR STRUCTURE WITH FRONTSIDE PORT AND CAVITY FEATURES FOR CONVEYING SAMPLE TO SENSING ELEMENT [patent_app_type] => utility [patent_app_number] => 17/821836 [patent_app_country] => US [patent_app_date] => 2022-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17821836 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/821836
Semiconductor structure with frontside port and cavity features for conveying sample to sensing element Aug 23, 2022 Issued
Array ( [id] => 18991103 [patent_doc_number] => 20240063072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => LASER ASSISTED ETCHING OF DIELECTRICS IN IC DEVICES [patent_app_type] => utility [patent_app_number] => 17/891530 [patent_app_country] => US [patent_app_date] => 2022-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891530 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891530
LASER ASSISTED ETCHING OF DIELECTRICS IN IC DEVICES Aug 18, 2022 Pending
Array ( [id] => 18991103 [patent_doc_number] => 20240063072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => LASER ASSISTED ETCHING OF DIELECTRICS IN IC DEVICES [patent_app_type] => utility [patent_app_number] => 17/891530 [patent_app_country] => US [patent_app_date] => 2022-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891530 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891530
LASER ASSISTED ETCHING OF DIELECTRICS IN IC DEVICES Aug 18, 2022 Pending
Array ( [id] => 18993009 [patent_doc_number] => 20240064978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICES, SYSTEMS, AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/891055 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9810 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891055 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891055
THREE-DIMENSIONAL MEMORY DEVICES, SYSTEMS, AND METHODS FOR FORMING THE SAME Aug 17, 2022 Pending
Array ( [id] => 18991248 [patent_doc_number] => 20240063217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => SEMICONDUCTOR STRUCTURES WITH BACK SIDE TRANSISTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/889615 [patent_app_country] => US [patent_app_date] => 2022-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10472 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889615 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/889615
SEMICONDUCTOR STRUCTURES WITH BACK SIDE TRANSISTOR DEVICES Aug 16, 2022 Pending
Array ( [id] => 18587680 [patent_doc_number] => 20230269945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => EMBEDDED SONOS MEMORY AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 17/888998 [patent_app_country] => US [patent_app_date] => 2022-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3893 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17888998 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/888998
Embedded SONOS memory and method of making the same Aug 15, 2022 Issued
Array ( [id] => 18587680 [patent_doc_number] => 20230269945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => EMBEDDED SONOS MEMORY AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 17/888998 [patent_app_country] => US [patent_app_date] => 2022-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3893 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17888998 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/888998
Embedded SONOS memory and method of making the same Aug 15, 2022 Issued
Array ( [id] => 20347721 [patent_doc_number] => 12471460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Display apparatus including a pad at a non-display area overlapping with a conductor connecting a conductive line to the pad [patent_app_type] => utility [patent_app_number] => 17/879590 [patent_app_country] => US [patent_app_date] => 2022-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10496 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17879590 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/879590
Display apparatus including a pad at a non-display area overlapping with a conductor connecting a conductive line to the pad Aug 1, 2022 Issued
Array ( [id] => 18498825 [patent_doc_number] => 20230221552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => DISPLAY DEVICE, AUGMENTED REALITY DEVICE INCLUDING DISPLAY DEVICE, AND METHOD OF MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/877402 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12872 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877402 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877402
DISPLAY DEVICE, AUGMENTED REALITY DEVICE INCLUDING DISPLAY DEVICE, AND METHOD OF MANUFACTURING DISPLAY DEVICE Jul 28, 2022 Pending
Array ( [id] => 18900462 [patent_doc_number] => 20240015947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/861743 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17861743 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/861743
Method for manufacturing semiconductor device having buried gate structure Jul 10, 2022 Issued
Array ( [id] => 18166435 [patent_doc_number] => 20230033038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => TWO-DIMENSION SELF-ALIGNED SCHEME WITH SUBTRACTIVE METAL ETCH [patent_app_type] => utility [patent_app_number] => 17/859838 [patent_app_country] => US [patent_app_date] => 2022-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7645 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17859838 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/859838
Two-dimension self-aligned scheme with subtractive metal etch Jul 6, 2022 Issued
Array ( [id] => 18124051 [patent_doc_number] => 20230009662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => NITRIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/858168 [patent_app_country] => US [patent_app_date] => 2022-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12604 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17858168 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/858168
Nitride semiconductor device Jul 5, 2022 Issued
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