Search

Edward Thomas Tolan

Examiner (ID: 3664, Phone: (571)272-4525 , Office: P/3725 )

Most Active Art Unit
3725
Art Unit(s)
3201, 3725
Total Applications
2859
Issued Applications
2278
Pending Applications
141
Abandoned Applications
440

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11591656 [patent_doc_number] => 20170116067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-27 [patent_title] => 'REPORTING ERRORS TO A DATA STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/923395 [patent_app_country] => US [patent_app_date] => 2015-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6711 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14923395 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/923395
Reporting errors to a data storage device Oct 25, 2015 Issued
Array ( [id] => 13100335 [patent_doc_number] => 10069518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-04 [patent_title] => Uneven bit distributions for encoder parsing [patent_app_type] => utility [patent_app_number] => 14/920584 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9709 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920584 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920584
Uneven bit distributions for encoder parsing Oct 21, 2015 Issued
Array ( [id] => 11571561 [patent_doc_number] => 20170110205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'BUILT-IN SELF-TEST (BIST) CIRCUIT AND ASSOCIATED BIST METHOD FOR EMBEDDED MEMORIES' [patent_app_type] => utility [patent_app_number] => 14/918149 [patent_app_country] => US [patent_app_date] => 2015-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11159 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14918149 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/918149
Built-in self-test (BIST) circuit and associated BIST method for embedded memories Oct 19, 2015 Issued
Array ( [id] => 11571559 [patent_doc_number] => 20170110204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'ENHANCED MEMORY BUILT-IN SELF-TEST ARCHITECTURE FOR DE-FEATURED MEMORIES' [patent_app_type] => utility [patent_app_number] => 14/885840 [patent_app_country] => US [patent_app_date] => 2015-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5834 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14885840 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/885840
ENHANCED MEMORY BUILT-IN SELF-TEST ARCHITECTURE FOR DE-FEATURED MEMORIES Oct 15, 2015 Abandoned
Array ( [id] => 11795167 [patent_doc_number] => 09404973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-02 [patent_title] => 'Test clock/test mode slect (TCK/TMS), select, data register (DR) connection circuitry between test access port (TAP) and bypass register' [patent_app_type] => utility [patent_app_number] => 14/879299 [patent_app_country] => US [patent_app_date] => 2015-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 67 [patent_no_of_words] => 20031 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14879299 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/879299
Test clock/test mode slect (TCK/TMS), select, data register (DR) connection circuitry between test access port (TAP) and bypass register Oct 8, 2015 Issued
Array ( [id] => 13072435 [patent_doc_number] => 10057015 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-21 [patent_title] => Hybrid ARQ re-transmission over peer-to-peer air interface upon error in transmission over client-server air interface [patent_app_type] => utility [patent_app_number] => 14/873934 [patent_app_country] => US [patent_app_date] => 2015-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7905 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14873934 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/873934
Hybrid ARQ re-transmission over peer-to-peer air interface upon error in transmission over client-server air interface Oct 1, 2015 Issued
Array ( [id] => 10683261 [patent_doc_number] => 20160029406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-28 [patent_title] => 'METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING SCHEDULING ASSIGNMENTS IN A COMMUNICATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/872789 [patent_app_country] => US [patent_app_date] => 2015-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5599 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14872789 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/872789
Method and apparatus for transmitting and receiving scheduling assignments in a communication system Sep 30, 2015 Issued
Array ( [id] => 11875432 [patent_doc_number] => 09747206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-29 [patent_title] => 'Methods for reprogramming data and apparatuses using the same' [patent_app_type] => utility [patent_app_number] => 14/862697 [patent_app_country] => US [patent_app_date] => 2015-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2840 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14862697 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/862697
Methods for reprogramming data and apparatuses using the same Sep 22, 2015 Issued
Array ( [id] => 12419058 [patent_doc_number] => 09973306 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-15 [patent_title] => Freshness-sensitive message delivery [patent_app_type] => utility [patent_app_number] => 14/853884 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14853884 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/853884
Freshness-sensitive message delivery Sep 13, 2015 Issued
Array ( [id] => 11503861 [patent_doc_number] => 20170078047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'Transmitter Distortion Management' [patent_app_type] => utility [patent_app_number] => 14/851162 [patent_app_country] => US [patent_app_date] => 2015-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6995 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14851162 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/851162
Transmitter Distortion Management Sep 10, 2015 Abandoned
Array ( [id] => 11258440 [patent_doc_number] => 09483340 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-01 [patent_title] => 'Estimating bit error rate' [patent_app_type] => utility [patent_app_number] => 14/849116 [patent_app_country] => US [patent_app_date] => 2015-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11404 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14849116 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/849116
Estimating bit error rate Sep 8, 2015 Issued
Array ( [id] => 11577607 [patent_doc_number] => 09632869 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-25 [patent_title] => 'Error correction for interconnect circuits' [patent_app_type] => utility [patent_app_number] => 14/848070 [patent_app_country] => US [patent_app_date] => 2015-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 8524 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14848070 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/848070
Error correction for interconnect circuits Sep 7, 2015 Issued
Array ( [id] => 11494407 [patent_doc_number] => 20170068591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'EFFICIENT SEARCH FOR OPTIMAL READ THRESHOLDS IN FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 14/847037 [patent_app_country] => US [patent_app_date] => 2015-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11647 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14847037 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/847037
Efficient search for optimal read thresholds in flash memory Sep 7, 2015 Issued
Array ( [id] => 11681964 [patent_doc_number] => 09680508 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-13 [patent_title] => 'Systems, methods and computer program products including features of transforming data involving a secure format from which the data is recoverable' [patent_app_type] => utility [patent_app_number] => 14/846919 [patent_app_country] => US [patent_app_date] => 2015-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 31 [patent_no_of_words] => 19940 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14846919 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/846919
Systems, methods and computer program products including features of transforming data involving a secure format from which the data is recoverable Sep 6, 2015 Issued
Array ( [id] => 10739476 [patent_doc_number] => 20160085627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'Memory System, Error Correction Device, and Error Correction Method' [patent_app_type] => utility [patent_app_number] => 14/842356 [patent_app_country] => US [patent_app_date] => 2015-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 19125 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842356 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/842356
Memory system, error correction device, and error correction method Aug 31, 2015 Issued
Array ( [id] => 11473668 [patent_doc_number] => 20170060451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'ERASE BLOCK STATE DETECTION' [patent_app_type] => utility [patent_app_number] => 14/842687 [patent_app_country] => US [patent_app_date] => 2015-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9086 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842687 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/842687
Erase block state detection Aug 31, 2015 Issued
Array ( [id] => 10724508 [patent_doc_number] => 20160070657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'Electronic Apparatus and Management Method Thereof' [patent_app_type] => utility [patent_app_number] => 14/840362 [patent_app_country] => US [patent_app_date] => 2015-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2392 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14840362 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/840362
Electronic apparatus and management method thereof Aug 30, 2015 Issued
Array ( [id] => 11021794 [patent_doc_number] => 20160218748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'APPARATUS AND METHOD FOR SENDING AND RECEIVING BROADCAST SIGNALS' [patent_app_type] => utility [patent_app_number] => 14/837542 [patent_app_country] => US [patent_app_date] => 2015-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 25429 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14837542 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/837542
Apparatus and method for sending and receiving broadcast signals Aug 26, 2015 Issued
Array ( [id] => 11292541 [patent_doc_number] => 20160342473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'EXTENDED ERROR CORRECTION CODING DATA STORAGE' [patent_app_type] => utility [patent_app_number] => 14/835804 [patent_app_country] => US [patent_app_date] => 2015-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4932 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14835804 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/835804
Extended error correction coding data storage Aug 25, 2015 Issued
Array ( [id] => 11883505 [patent_doc_number] => 09754685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Memory control device and memory control method' [patent_app_type] => utility [patent_app_number] => 14/829634 [patent_app_country] => US [patent_app_date] => 2015-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5820 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14829634 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/829634
Memory control device and memory control method Aug 17, 2015 Issued
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