Search

Edward Thomas Tolan

Examiner (ID: 3664, Phone: (571)272-4525 , Office: P/3725 )

Most Active Art Unit
3725
Art Unit(s)
3201, 3725
Total Applications
2859
Issued Applications
2278
Pending Applications
141
Abandoned Applications
440

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15919521 [patent_doc_number] => 10657000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Optimizing data storage in a dispersed storage network [patent_app_type] => utility [patent_app_number] => 15/839426 [patent_app_country] => US [patent_app_date] => 2017-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 7701 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15839426 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/839426
Optimizing data storage in a dispersed storage network Dec 11, 2017 Issued
Array ( [id] => 15373413 [patent_doc_number] => 10528425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Transitioning to an optimized data storage approach in a dispersed storage network [patent_app_type] => utility [patent_app_number] => 15/839192 [patent_app_country] => US [patent_app_date] => 2017-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 8093 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15839192 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/839192
Transitioning to an optimized data storage approach in a dispersed storage network Dec 11, 2017 Issued
Array ( [id] => 12611988 [patent_doc_number] => 20180095826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => ACCESSING DATA IN A DISPERSED STORAGE NETWORK [patent_app_type] => utility [patent_app_number] => 15/832391 [patent_app_country] => US [patent_app_date] => 2017-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15832391 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/832391
Accessing data in a dispersed storage network Dec 4, 2017 Issued
Array ( [id] => 14383797 [patent_doc_number] => 20190165811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => LOW DENSITY PARITY CHECK CODE DECODER AND DECODING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/829973 [patent_app_country] => US [patent_app_date] => 2017-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3629 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15829973 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/829973
LOW DENSITY PARITY CHECK CODE DECODER AND DECODING METHOD THEREOF Dec 2, 2017 Abandoned
Array ( [id] => 14764825 [patent_doc_number] => 10393805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => JTAG support over a broadcast bus in a distributed memory buffer system [patent_app_type] => utility [patent_app_number] => 15/828466 [patent_app_country] => US [patent_app_date] => 2017-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6126 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15828466 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/828466
JTAG support over a broadcast bus in a distributed memory buffer system Nov 30, 2017 Issued
Array ( [id] => 13467371 [patent_doc_number] => 20180285228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => MEMORY TEST SYSTEM AND AN OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/828701 [patent_app_country] => US [patent_app_date] => 2017-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6316 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15828701 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/828701
Memory test system and an operating method thereof Nov 30, 2017 Issued
Array ( [id] => 14922195 [patent_doc_number] => 10432433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Soft bit computation unit for MIMO detection and error correction [patent_app_type] => utility [patent_app_number] => 15/827798 [patent_app_country] => US [patent_app_date] => 2017-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 9642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15827798 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/827798
Soft bit computation unit for MIMO detection and error correction Nov 29, 2017 Issued
Array ( [id] => 17122675 [patent_doc_number] => 11133824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Error correction device and optical transmission/reception device [patent_app_type] => utility [patent_app_number] => 16/756334 [patent_app_country] => US [patent_app_date] => 2017-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 9497 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16756334 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/756334
Error correction device and optical transmission/reception device Nov 26, 2017 Issued
Array ( [id] => 14825525 [patent_doc_number] => 10409772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Accessing serially stored data in a dispersed storage network [patent_app_type] => utility [patent_app_number] => 15/822302 [patent_app_country] => US [patent_app_date] => 2017-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7950 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15822302 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/822302
Accessing serially stored data in a dispersed storage network Nov 26, 2017 Issued
Array ( [id] => 12617094 [patent_doc_number] => 20180097528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => ERROR LOCATOR POLYNOMIAL DECODER AND METHOD [patent_app_type] => utility [patent_app_number] => 15/821382 [patent_app_country] => US [patent_app_date] => 2017-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28481 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15821382 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/821382
Error locator polynomial decoder and method Nov 21, 2017 Issued
Array ( [id] => 15378249 [patent_doc_number] => 10530861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Utilizing multiple storage pools in a dispersed storage network [patent_app_type] => utility [patent_app_number] => 15/818633 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818633 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818633
Utilizing multiple storage pools in a dispersed storage network Nov 19, 2017 Issued
Array ( [id] => 14954813 [patent_doc_number] => 10438683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Classifying memory cells to multiple impairment profiles based on readout bit-flip counts [patent_app_type] => utility [patent_app_number] => 15/810166 [patent_app_country] => US [patent_app_date] => 2017-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15810166 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/810166
Classifying memory cells to multiple impairment profiles based on readout bit-flip counts Nov 12, 2017 Issued
Array ( [id] => 14025717 [patent_doc_number] => 20190074852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT [patent_app_type] => utility [patent_app_number] => 15/805152 [patent_app_country] => US [patent_app_date] => 2017-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9510 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15805152 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/805152
Decoding method, memory storage device and memory control circuit unit Nov 6, 2017 Issued
Array ( [id] => 14786411 [patent_doc_number] => 20190268103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => METHOD AND DEVICE FOR SCHEDULING UPLINK CONTROL CHANNEL IN NEXT GENERATION WIRELESS NETWORK [patent_app_type] => utility [patent_app_number] => 16/344947 [patent_app_country] => US [patent_app_date] => 2017-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16344947 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/344947
Method and device for scheduling uplink control channel in next generation wireless network Oct 26, 2017 Issued
Array ( [id] => 12208997 [patent_doc_number] => 20180054220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'TRANSMITTING APPARATUS AND INTERLEAVING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/783162 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 46942 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783162 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783162
Transmitting apparatus and interleaving method thereof Oct 12, 2017 Issued
Array ( [id] => 13708813 [patent_doc_number] => 20170365361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICES, MEMORY SYSTEMS INCLUDING THE SAME AND METHOD OF CORRECTING ERRORS IN THE SAME [patent_app_type] => utility [patent_app_number] => 15/696794 [patent_app_country] => US [patent_app_date] => 2017-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15696794 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/696794
Semiconductor memory devices, memory systems including the same and method of correcting errors in the same Sep 5, 2017 Issued
Array ( [id] => 13742123 [patent_doc_number] => 20180375531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => DECODING CIRCUIT AND METHOD FOR QUASI-CYCLIC LOW-DENSITY PARITY-CHECK CODES [patent_app_type] => utility [patent_app_number] => 15/691857 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15691857 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/691857
DECODING CIRCUIT AND METHOD FOR QUASI-CYCLIC LOW-DENSITY PARITY-CHECK CODES Aug 30, 2017 Abandoned
Array ( [id] => 12208993 [patent_doc_number] => 20180054219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'METHOD AND APPARATUS FOR CONSTRUCTING INTERLEAVING SEQUENCE IN A WIRELESS COMMUNICATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/680093 [patent_app_country] => US [patent_app_date] => 2017-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 40381 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15680093 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/680093
Method and apparatus for constructing interleaving sequence in a wireless communication system Aug 16, 2017 Issued
Array ( [id] => 12053328 [patent_doc_number] => 20170329671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'DATA STORAGE ERROR PROTECTION' [patent_app_type] => utility [patent_app_number] => 15/664589 [patent_app_country] => US [patent_app_date] => 2017-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11609 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15664589 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/664589
Data storage error protection Jul 30, 2017 Issued
Array ( [id] => 12032781 [patent_doc_number] => 20170322880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'Methods for Reprogramming Data and Apparatuses using the Same' [patent_app_type] => utility [patent_app_number] => 15/657697 [patent_app_country] => US [patent_app_date] => 2017-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2900 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15657697 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/657697
Methods for reprogramming data and apparatuses using the same Jul 23, 2017 Issued
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