Search

Edwin A. Leon Munoz

Examiner (ID: 1943, Phone: (571)272-2008 , Office: P/2833 )

Most Active Art Unit
2833
Art Unit(s)
2833, 2831
Total Applications
2856
Issued Applications
2445
Pending Applications
140
Abandoned Applications
306

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15660899 [patent_doc_number] => 20200092980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => Printed Circuit Board with Routing of a Conductor and Dielectric Strands [patent_app_type] => utility [patent_app_number] => 16/670374 [patent_app_country] => US [patent_app_date] => 2019-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4857 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16670374 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/670374
Method of producing printed circuit boards with routing conductors and dielectric strands Oct 30, 2019 Issued
Array ( [id] => 15842021 [patent_doc_number] => 20200136293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => ELECTRICAL CONNECTOR UPPER AND LOWER CONTACT MODULE UNITS MADE BY HOLDING RESPECTIVE CONTACT CARRIER STRIPS AGAINST EACH OTHER FOR SUBSEQUENT OVER-MOLDING OPERATION [patent_app_type] => utility [patent_app_number] => 16/667933 [patent_app_country] => US [patent_app_date] => 2019-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1830 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667933 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/667933
Method of making an electrical connector by holding carrier strips against each other for over-molding Oct 29, 2019 Issued
Array ( [id] => 15842129 [patent_doc_number] => 20200136347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => Low Inductance Laser Driver Packaging Using Lead-Frame and Thin Dielectric Layer Mask Pad Definition [patent_app_type] => utility [patent_app_number] => 16/666714 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3543 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666714 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/666714
Low inductance laser driver packaging using lead-frame and thin dielectric layer mask pad definition Oct 28, 2019 Issued
Array ( [id] => 17002548 [patent_doc_number] => 11081370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Methods of manufacturing an encapsulated semiconductor device [patent_app_type] => utility [patent_app_number] => 16/665499 [patent_app_country] => US [patent_app_date] => 2019-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 4648 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16665499 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/665499
Methods of manufacturing an encapsulated semiconductor device Oct 27, 2019 Issued
Array ( [id] => 19461479 [patent_doc_number] => 12102015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Precursor for use in manufacturing superconducting wire, production method of precursor, and superconducting wire [patent_app_type] => utility [patent_app_number] => 17/284964 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 7962 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17284964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/284964
Precursor for use in manufacturing superconducting wire, production method of precursor, and superconducting wire Oct 24, 2019 Issued
Array ( [id] => 15507391 [patent_doc_number] => 20200053884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => MANUFACTURING METHOD OF A MULTI-LAYER CIRCUIT BOARD [patent_app_type] => utility [patent_app_number] => 16/660832 [patent_app_country] => US [patent_app_date] => 2019-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2883 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16660832 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/660832
Manufacturing method of a multi-layer circuit board Oct 22, 2019 Issued
Array ( [id] => 17270360 [patent_doc_number] => 11195788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Hybrid dielectric scheme in packages [patent_app_type] => utility [patent_app_number] => 16/656642 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 6960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16656642 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/656642
Hybrid dielectric scheme in packages Oct 17, 2019 Issued
Array ( [id] => 17205401 [patent_doc_number] => 20210345496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SCREEN [patent_app_type] => utility [patent_app_number] => 17/284820 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8103 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17284820 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/284820
Semiconductor device manufacturing method Oct 17, 2019 Issued
Array ( [id] => 17248881 [patent_doc_number] => 20210368626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => PACKAGING STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/054504 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17054504 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/054504
Method for manufacturing a packaging structure Sep 23, 2019 Issued
Array ( [id] => 17205389 [patent_doc_number] => 20210345484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => METHOD FOR MANUFACTURING DEVICE CONNECTED BODY, AND DEVICE CONNECTED BODY [patent_app_type] => utility [patent_app_number] => 17/285388 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8243 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17285388 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/285388
METHOD FOR MANUFACTURING DEVICE CONNECTED BODY, AND DEVICE CONNECTED BODY Sep 23, 2019 Abandoned
Array ( [id] => 15354921 [patent_doc_number] => 20200015352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => METHOD OF MANUFACTURING PHYSICAL STRUCTURE FOR HIGH FREQUENCY SIGNAL TRANSMISSION [patent_app_type] => utility [patent_app_number] => 16/577062 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1839 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16577062 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/577062
Method of manufacturing physical structure for high frequency signal transmission Sep 19, 2019 Issued
Array ( [id] => 17234240 [patent_doc_number] => 20210360797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => COPPER METALLIZATION FOR THROUGH-GLASS VIAS ON THIN GLASS [patent_app_type] => utility [patent_app_number] => 17/277748 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17277748 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/277748
Copper metallization for through-glass vias on thin glass Sep 19, 2019 Issued
Array ( [id] => 17893562 [patent_doc_number] => 11456548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Reliability enhancement of press fit connectors [patent_app_type] => utility [patent_app_number] => 16/574845 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 10197 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16574845 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/574845
Reliability enhancement of press fit connectors Sep 17, 2019 Issued
Array ( [id] => 19901427 [patent_doc_number] => 12279380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Method for producing a circuit board arrangement [patent_app_type] => utility [patent_app_number] => 17/273133 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 0 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17273133 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/273133
Method for producing a circuit board arrangement Sep 9, 2019 Issued
Array ( [id] => 15331611 [patent_doc_number] => 20200006135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => Method and Plater Arrangement for Failure-Free Copper Filling of a Hole in a Component Carrier [patent_app_type] => utility [patent_app_number] => 16/565733 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6563 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16565733 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/565733
Method and Plater Arrangement for Failure-Free Copper Filling of a Hole in a Component Carrier Sep 9, 2019 Abandoned
Array ( [id] => 16692700 [patent_doc_number] => 20210075179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => STUTTER STEP PRESS-FIT CONNECTOR INSERTION PROCESS [patent_app_type] => utility [patent_app_number] => 16/565895 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16565895 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/565895
Stutter step press-fit connector insertion process Sep 9, 2019 Issued
Array ( [id] => 16694017 [patent_doc_number] => 20210076496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => SOLDER ELECTRONIC COMPONENTS TO PRINTED CONDUCTIVE INK [patent_app_type] => utility [patent_app_number] => 16/564868 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16564868 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/564868
SOLDER ELECTRONIC COMPONENTS TO PRINTED CONDUCTIVE INK Sep 8, 2019 Abandoned
Array ( [id] => 15615421 [patent_doc_number] => 20200078115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => SURGICAL MODULAR ENERGY SYSTEM WITH FOOTER MODULE [patent_app_type] => utility [patent_app_number] => 16/562185 [patent_app_country] => US [patent_app_date] => 2019-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 50771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562185 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/562185
Surgical modular energy system with footer module Sep 4, 2019 Issued
Array ( [id] => 20118704 [patent_doc_number] => 12368426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Method for forming bulk acoustic wave resonance device [patent_app_type] => utility [patent_app_number] => 17/640338 [patent_app_country] => US [patent_app_date] => 2019-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 16458 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17640338 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/640338
Method for forming bulk acoustic wave resonance device Sep 4, 2019 Issued
Array ( [id] => 17918683 [patent_doc_number] => 20220321079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => METHOD FOR FORMING BULK ACOUSTIC WAVE RESONANCE DEVICE [patent_app_type] => utility [patent_app_number] => 17/640802 [patent_app_country] => US [patent_app_date] => 2019-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -42 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17640802 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/640802
Method for forming bulk acoustic wave resonance device Sep 4, 2019 Issued
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