Search

Edwin J. Toledo-duran

Examiner (ID: 9389, Phone: (571)270-7501 , Office: P/3678 )

Most Active Art Unit
3678
Art Unit(s)
3678, 3674
Total Applications
843
Issued Applications
545
Pending Applications
91
Abandoned Applications
236

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9337210 [patent_doc_number] => 20140063992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/072512 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6534 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072512 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/072512
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE Nov 4, 2013 Abandoned
Array ( [id] => 9952810 [patent_doc_number] => 09001611 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-04-07 [patent_title] => 'Three-dimensional two port register file' [patent_app_type] => utility [patent_app_number] => 14/069411 [patent_app_country] => US [patent_app_date] => 2013-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6348 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14069411 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/069411
Three-dimensional two port register file Oct 31, 2013 Issued
Array ( [id] => 10178636 [patent_doc_number] => 09208847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Memory devices with improved refreshing operations' [patent_app_type] => utility [patent_app_number] => 14/067907 [patent_app_country] => US [patent_app_date] => 2013-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4164 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14067907 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/067907
Memory devices with improved refreshing operations Oct 29, 2013 Issued
Array ( [id] => 10232136 [patent_doc_number] => 20150117130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'PROGRAMMING MULTIPLE SERIAL INPUT DEVICES' [patent_app_type] => utility [patent_app_number] => 14/066124 [patent_app_country] => US [patent_app_date] => 2013-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6665 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14066124 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/066124
Programming multiple serial input devices Oct 28, 2013 Issued
Array ( [id] => 10232120 [patent_doc_number] => 20150117114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'WORD LINE COUPLING FOR DEEP PROGRAM-VERIFY, ERASE-VERIFY AND READ' [patent_app_type] => utility [patent_app_number] => 14/065092 [patent_app_country] => US [patent_app_date] => 2013-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14065092 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/065092
Word line coupling for deep program-verify, erase-verify and read Oct 27, 2013 Issued
Array ( [id] => 10189425 [patent_doc_number] => 09218851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-22 [patent_title] => 'Power drop protection for a data storage device' [patent_app_type] => utility [patent_app_number] => 14/062534 [patent_app_country] => US [patent_app_date] => 2013-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14062534 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/062534
Power drop protection for a data storage device Oct 23, 2013 Issued
Array ( [id] => 9305209 [patent_doc_number] => 20140043883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'Three dimensional structure memory' [patent_app_type] => utility [patent_app_number] => 14/060840 [patent_app_country] => US [patent_app_date] => 2013-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7181 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14060840 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/060840
Three dimensional structure memory Oct 22, 2013 Issued
Array ( [id] => 9705682 [patent_doc_number] => 08830762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Methods, devices, and systems for dealing with threshold voltage change in memory devices' [patent_app_type] => utility [patent_app_number] => 14/056713 [patent_app_country] => US [patent_app_date] => 2013-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 8398 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14056713 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/056713
Methods, devices, and systems for dealing with threshold voltage change in memory devices Oct 16, 2013 Issued
Array ( [id] => 9601902 [patent_doc_number] => 20140198584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'BUFFERING SYSTEMS FOR ACCESSING MULTIPLE LAYERS OF MEMORY IN INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 14/053408 [patent_app_country] => US [patent_app_date] => 2013-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7975 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14053408 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/053408
Buffering systems for accessing multiple layers of memory in integrated circuits Oct 13, 2013 Issued
Array ( [id] => 9851633 [patent_doc_number] => 08953373 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-10 [patent_title] => 'Flash memory read retry using histograms' [patent_app_type] => utility [patent_app_number] => 14/052252 [patent_app_country] => US [patent_app_date] => 2013-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 9738 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14052252 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/052252
Flash memory read retry using histograms Oct 10, 2013 Issued
Array ( [id] => 10218609 [patent_doc_number] => 20150103602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-16 [patent_title] => 'SECTOR-BASED REGULATION OF PROGRAM VOLTAGES FOR NON-VOLATILE MEMORY (NVM) SYSTEMS' [patent_app_type] => utility [patent_app_number] => 14/050962 [patent_app_country] => US [patent_app_date] => 2013-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5594 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14050962 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/050962
Sector-based regulation of program voltages for non-volatile memory (NVM) systems Oct 9, 2013 Issued
Array ( [id] => 10218602 [patent_doc_number] => 20150103595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-16 [patent_title] => 'BIT LINE AND COMPARE VOLTAGE MODULATION FOR SENSING NONVOLATILE STORAGE ELEMENTS' [patent_app_type] => utility [patent_app_number] => 14/051416 [patent_app_country] => US [patent_app_date] => 2013-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 18780 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14051416 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/051416
Bit line and compare voltage modulation for sensing nonvolatile storage elements Oct 9, 2013 Issued
Array ( [id] => 9712622 [patent_doc_number] => 08837207 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-16 [patent_title] => 'Static memory and memory cell thereof' [patent_app_type] => utility [patent_app_number] => 14/049212 [patent_app_country] => US [patent_app_date] => 2013-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6792 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 520 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14049212 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/049212
Static memory and memory cell thereof Oct 8, 2013 Issued
Array ( [id] => 9292933 [patent_doc_number] => 20140036567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 14/050006 [patent_app_country] => US [patent_app_date] => 2013-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6711 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14050006 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/050006
Semiconductor device and method for manufacturing same Oct 8, 2013 Issued
Array ( [id] => 9959603 [patent_doc_number] => 09007817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Pre-charging bitlines in a static random access memory (SRAM) prior to data access for reducing leakage power, and related systems and methods' [patent_app_type] => utility [patent_app_number] => 14/049312 [patent_app_country] => US [patent_app_date] => 2013-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13206 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14049312 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/049312
Pre-charging bitlines in a static random access memory (SRAM) prior to data access for reducing leakage power, and related systems and methods Oct 8, 2013 Issued
Array ( [id] => 9420287 [patent_doc_number] => 20140104937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'MEMORY DEVICE WITH TIMING OVERLAP MODE' [patent_app_type] => utility [patent_app_number] => 14/049844 [patent_app_country] => US [patent_app_date] => 2013-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6870 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14049844 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/049844
Memory device with timing overlap mode Oct 8, 2013 Issued
Array ( [id] => 10952343 [patent_doc_number] => 20140355364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'MEMORY AND MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/049878 [patent_app_country] => US [patent_app_date] => 2013-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8829 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14049878 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/049878
Memory and memory system Oct 8, 2013 Issued
Array ( [id] => 10213298 [patent_doc_number] => 20150098290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-09 [patent_title] => 'METHODS CIRCUITS APPARATUSES AND SYSTEMS FOR PROVIDING CURRENT TO A NON-VOLATILE MEMORY ARRAY AND NON-VOLATILE MEMORY DEVICES PRODUCED ACCORDINGLY' [patent_app_type] => utility [patent_app_number] => 14/048076 [patent_app_country] => US [patent_app_date] => 2013-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4014 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14048076 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/048076
Methods circuits apparatuses and systems for providing current to a non-volatile memory array and non-volatile memory devices produced accordingly Oct 7, 2013 Issued
Array ( [id] => 9764090 [patent_doc_number] => 08848426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Cross-point variable resistance nonvolatile memory device and reading method for cross-point variable resistance nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 14/047214 [patent_app_country] => US [patent_app_date] => 2013-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 22218 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14047214 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/047214
Cross-point variable resistance nonvolatile memory device and reading method for cross-point variable resistance nonvolatile memory device Oct 6, 2013 Issued
Array ( [id] => 9877192 [patent_doc_number] => 08964473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Select gate materials having different work functions in non-volatile memory' [patent_app_type] => utility [patent_app_number] => 14/047764 [patent_app_country] => US [patent_app_date] => 2013-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 47 [patent_no_of_words] => 16884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14047764 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/047764
Select gate materials having different work functions in non-volatile memory Oct 6, 2013 Issued
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