Search

Edwin Young

Examiner (ID: 7742, Phone: (571)272-4781 , Office: P/3659 )

Most Active Art Unit
3655
Art Unit(s)
3659, 3681, 3655
Total Applications
2039
Issued Applications
1854
Pending Applications
95
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 929601 [patent_doc_number] => 07315913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-01 [patent_title] => 'CPU system, bus bridge, control method therefor, and computer system' [patent_app_type] => utility [patent_app_number] => 11/254104 [patent_app_country] => US [patent_app_date] => 2005-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6273 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/315/07315913.pdf [firstpage_image] =>[orig_patent_app_number] => 11254104 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/254104
CPU system, bus bridge, control method therefor, and computer system Oct 18, 2005 Issued
Array ( [id] => 5836421 [patent_doc_number] => 20060248253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Motherboard and bridge module therefor' [patent_app_type] => utility [patent_app_number] => 11/246065 [patent_app_country] => US [patent_app_date] => 2005-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2304 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20060248253.pdf [firstpage_image] =>[orig_patent_app_number] => 11246065 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/246065
Motherboard and bridge module therefor Oct 10, 2005 Abandoned
Array ( [id] => 675920 [patent_doc_number] => 07093058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Single request data transfer regardless of size and alignment' [patent_app_type] => utility [patent_app_number] => 11/246427 [patent_app_country] => US [patent_app_date] => 2005-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5206 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/093/07093058.pdf [firstpage_image] =>[orig_patent_app_number] => 11246427 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/246427
Single request data transfer regardless of size and alignment Oct 6, 2005 Issued
Array ( [id] => 5891784 [patent_doc_number] => 20060277342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Modules and backplanes' [patent_app_type] => utility [patent_app_number] => 11/243921 [patent_app_country] => US [patent_app_date] => 2005-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6992 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20060277342.pdf [firstpage_image] =>[orig_patent_app_number] => 11243921 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/243921
Modules and backplanes Oct 4, 2005 Issued
Array ( [id] => 5770685 [patent_doc_number] => 20060020731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-26 [patent_title] => 'Interrupt control method, interrupt control apparatus and interrupt control medium' [patent_app_type] => utility [patent_app_number] => 11/238952 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4023 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20060020731.pdf [firstpage_image] =>[orig_patent_app_number] => 11238952 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/238952
Interrupt control method, interrupt control apparatus and interrupt control medium Sep 29, 2005 Issued
Array ( [id] => 179975 [patent_doc_number] => 07657691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Simplified universal serial bus (USB) hub architecture' [patent_app_type] => utility [patent_app_number] => 11/240908 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4036 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/657/07657691.pdf [firstpage_image] =>[orig_patent_app_number] => 11240908 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/240908
Simplified universal serial bus (USB) hub architecture Sep 29, 2005 Issued
Array ( [id] => 5778326 [patent_doc_number] => 20060106966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Data bus interface for a control unit, and control unit having a data bus interface' [patent_app_type] => utility [patent_app_number] => 11/215706 [patent_app_country] => US [patent_app_date] => 2005-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4892 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20060106966.pdf [firstpage_image] =>[orig_patent_app_number] => 11215706 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/215706
Data bus interface for a control unit, and control unit having a data bus interface Aug 28, 2005 Issued
Array ( [id] => 6932527 [patent_doc_number] => 20050283562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-22 [patent_title] => 'Round robin arbitration system' [patent_app_type] => utility [patent_app_number] => 11/212146 [patent_app_country] => US [patent_app_date] => 2005-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2950 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20050283562.pdf [firstpage_image] =>[orig_patent_app_number] => 11212146 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/212146
Multi-stage round robin arbitration system Aug 25, 2005 Issued
Array ( [id] => 5001302 [patent_doc_number] => 20070043936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'System and method for communicating with a processor event facility' [patent_app_type] => utility [patent_app_number] => 11/207971 [patent_app_country] => US [patent_app_date] => 2005-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 52 [patent_no_of_words] => 25741 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20070043936.pdf [firstpage_image] =>[orig_patent_app_number] => 11207971 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/207971
Method for communicating with a processor event facility Aug 18, 2005 Issued
Array ( [id] => 5155911 [patent_doc_number] => 20070038794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Method and system for allocating a bus' [patent_app_type] => utility [patent_app_number] => 11/200670 [patent_app_country] => US [patent_app_date] => 2005-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4385 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20070038794.pdf [firstpage_image] =>[orig_patent_app_number] => 11200670 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/200670
Method and system for allocating a bus Aug 9, 2005 Abandoned
Array ( [id] => 5906678 [patent_doc_number] => 20060047874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Resource management apparatus' [patent_app_type] => utility [patent_app_number] => 11/197302 [patent_app_country] => US [patent_app_date] => 2005-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5266 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20060047874.pdf [firstpage_image] =>[orig_patent_app_number] => 11197302 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/197302
Resource management apparatus Aug 4, 2005 Abandoned
Array ( [id] => 5684335 [patent_doc_number] => 20060200605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Electronic apparatus system with master node and slave node' [patent_app_type] => utility [patent_app_number] => 11/192142 [patent_app_country] => US [patent_app_date] => 2005-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3193 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20060200605.pdf [firstpage_image] =>[orig_patent_app_number] => 11192142 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/192142
Electronic apparatus system with master node and slave node Jul 28, 2005 Abandoned
Array ( [id] => 5761691 [patent_doc_number] => 20060212636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Blade computer with power backup capacitor, and blade management device and program therefor' [patent_app_type] => utility [patent_app_number] => 11/192133 [patent_app_country] => US [patent_app_date] => 2005-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9195 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20060212636.pdf [firstpage_image] =>[orig_patent_app_number] => 11192133 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/192133
Blade computer with power backup capacitor, and blade management device and program therefor Jul 28, 2005 Abandoned
Array ( [id] => 5822021 [patent_doc_number] => 20060026334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Operating system arrangement for flexible computer system design' [patent_app_type] => utility [patent_app_number] => 11/189153 [patent_app_country] => US [patent_app_date] => 2005-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6957 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20060026334.pdf [firstpage_image] =>[orig_patent_app_number] => 11189153 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/189153
Operating system arrangement for flexible computer system design Jul 24, 2005 Issued
Array ( [id] => 5916291 [patent_doc_number] => 20060129729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'Local bus architecture for video codec' [patent_app_type] => utility [patent_app_number] => 11/187359 [patent_app_country] => US [patent_app_date] => 2005-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4179 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20060129729.pdf [firstpage_image] =>[orig_patent_app_number] => 11187359 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/187359
Local bus architecture for video codec Jul 20, 2005 Abandoned
Array ( [id] => 5749270 [patent_doc_number] => 20060112204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Method for making a network formed by can type buses, a network and an apparatus having the network' [patent_app_type] => utility [patent_app_number] => 11/183425 [patent_app_country] => US [patent_app_date] => 2005-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3853 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20060112204.pdf [firstpage_image] =>[orig_patent_app_number] => 11183425 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/183425
Method for making a network formed by can type buses, a network and an apparatus having the network Jul 17, 2005 Abandoned
Array ( [id] => 7589702 [patent_doc_number] => 07664900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => 'Multiprocessor system and method for processing memory access' [patent_app_type] => utility [patent_app_number] => 10/586153 [patent_app_country] => US [patent_app_date] => 2005-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 18263 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/664/07664900.pdf [firstpage_image] =>[orig_patent_app_number] => 10586153 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/586153
Multiprocessor system and method for processing memory access Jun 30, 2005 Issued
Array ( [id] => 223379 [patent_doc_number] => 07610421 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-27 [patent_title] => 'Bus request control circuit' [patent_app_type] => utility [patent_app_number] => 11/174217 [patent_app_country] => US [patent_app_date] => 2005-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2918 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/610/07610421.pdf [firstpage_image] =>[orig_patent_app_number] => 11174217 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/174217
Bus request control circuit Jun 30, 2005 Issued
Array ( [id] => 5689829 [patent_doc_number] => 20060288144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'TECHNIQUES FOR HANDLING LOCK-RELATED INCONSISTENCIES' [patent_app_type] => utility [patent_app_number] => 11/156318 [patent_app_country] => US [patent_app_date] => 2005-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20060288144.pdf [firstpage_image] =>[orig_patent_app_number] => 11156318 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/156318
Techniques for handling lock-related inconsistencies Jun 15, 2005 Issued
Array ( [id] => 5644147 [patent_doc_number] => 20060282602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Data transmission device and method thereof' [patent_app_type] => utility [patent_app_number] => 11/148279 [patent_app_country] => US [patent_app_date] => 2005-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2944 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0282/20060282602.pdf [firstpage_image] =>[orig_patent_app_number] => 11148279 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/148279
Data transmission device and method thereof Jun 8, 2005 Abandoned
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