Search

Eileen P. Morgan

Examiner (ID: 5670, Phone: (571)272-4488 , Office: P/3723 )

Most Active Art Unit
3723
Art Unit(s)
3616, 3203, 3723
Total Applications
2919
Issued Applications
2247
Pending Applications
81
Abandoned Applications
595

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17744756 [patent_doc_number] => 11392829 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-19 [patent_title] => Managing data sparsity for neural networks [patent_app_type] => utility [patent_app_number] => 16/373301 [patent_app_country] => US [patent_app_date] => 2019-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 12713 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16373301 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/373301
Managing data sparsity for neural networks Apr 1, 2019 Issued
Array ( [id] => 15953285 [patent_doc_number] => 10664552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Stream processing for LU decomposition [patent_app_type] => utility [patent_app_number] => 16/371531 [patent_app_country] => US [patent_app_date] => 2019-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5981 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16371531 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/371531
Stream processing for LU decomposition Mar 31, 2019 Issued
Array ( [id] => 17136734 [patent_doc_number] => 11138290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Discrete cosine transform/inverse discrete cosine transform (DCT/IDCT) systems and methods [patent_app_type] => utility [patent_app_number] => 16/370955 [patent_app_country] => US [patent_app_date] => 2019-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 25336 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16370955 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/370955
Discrete cosine transform/inverse discrete cosine transform (DCT/IDCT) systems and methods Mar 29, 2019 Issued
Array ( [id] => 17365153 [patent_doc_number] => 11232175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => Method, system, and computer program product for determining causality [patent_app_type] => utility [patent_app_number] => 16/763585 [patent_app_country] => US [patent_app_date] => 2019-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12832 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16763585 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/763585
Method, system, and computer program product for determining causality Mar 27, 2019 Issued
Array ( [id] => 17092138 [patent_doc_number] => 11120328 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-14 [patent_title] => Systems and methods for reducing power consumption of convolution operations for artificial neural networks [patent_app_type] => utility [patent_app_number] => 16/354665 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 22294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354665 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354665
Systems and methods for reducing power consumption of convolution operations for artificial neural networks Mar 14, 2019 Issued
Array ( [id] => 18073034 [patent_doc_number] => 11531868 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-12-20 [patent_title] => Input value cache for temporarily storing input values [patent_app_type] => utility [patent_app_number] => 16/355653 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 27155 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16355653 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/355653
Input value cache for temporarily storing input values Mar 14, 2019 Issued
Array ( [id] => 16292044 [patent_doc_number] => 10768894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => Processor, information processing apparatus and operation method for processor [patent_app_type] => utility [patent_app_number] => 16/352919 [patent_app_country] => US [patent_app_date] => 2019-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 9971 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16352919 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/352919
Processor, information processing apparatus and operation method for processor Mar 13, 2019 Issued
Array ( [id] => 14570753 [patent_doc_number] => 20190212983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => PARALLEL DECIMAL MULTIPLICATION HARDWARE WITH A 3X GENERATOR [patent_app_type] => utility [patent_app_number] => 16/299337 [patent_app_country] => US [patent_app_date] => 2019-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5209 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16299337 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/299337
Parallel decimal multiplication hardware with a 3x generator Mar 11, 2019 Issued
Array ( [id] => 14574729 [patent_doc_number] => 20190214972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => METHODS AND APPARATUS FOR EFFICIENT LINEAR COMBINER [patent_app_type] => utility [patent_app_number] => 16/299299 [patent_app_country] => US [patent_app_date] => 2019-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4853 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16299299 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/299299
METHODS AND APPARATUS FOR EFFICIENT LINEAR COMBINER Mar 11, 2019 Abandoned
Array ( [id] => 16623253 [patent_doc_number] => 20210041906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => SECRET TABLE REFERENCE SYSTEM, METHOD, SECRET CALCULATION APPARATUS AND PROGRAM [patent_app_type] => utility [patent_app_number] => 16/977954 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3246 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 430 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16977954 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/977954
Secret table reference system, method, secret calculation apparatus and program Mar 10, 2019 Issued
Array ( [id] => 17017457 [patent_doc_number] => 11087099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Single transistor multiplier and method therefor [patent_app_type] => utility [patent_app_number] => 16/291311 [patent_app_country] => US [patent_app_date] => 2019-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3011 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16291311 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/291311
Single transistor multiplier and method therefor Mar 3, 2019 Issued
Array ( [id] => 17136429 [patent_doc_number] => 11137982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Acceleration circuitry [patent_app_type] => utility [patent_app_number] => 16/286992 [patent_app_country] => US [patent_app_date] => 2019-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 10876 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16286992 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/286992
Acceleration circuitry Feb 26, 2019 Issued
Array ( [id] => 15137375 [patent_doc_number] => 10482157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Data compression apparatus and data compression method and storage medium [patent_app_type] => utility [patent_app_number] => 16/287540 [patent_app_country] => US [patent_app_date] => 2019-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6410 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16287540 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/287540
Data compression apparatus and data compression method and storage medium Feb 26, 2019 Issued
Array ( [id] => 17637103 [patent_doc_number] => 11347827 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Hybrid matrix multiplication pipeline [patent_app_type] => utility [patent_app_number] => 16/287013 [patent_app_country] => US [patent_app_date] => 2019-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5584 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16287013 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/287013
Hybrid matrix multiplication pipeline Feb 26, 2019 Issued
Array ( [id] => 14751041 [patent_doc_number] => 20190258694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => PERMUTING IN A MATRIX-VECTOR PROCESSOR [patent_app_type] => utility [patent_app_number] => 16/283913 [patent_app_country] => US [patent_app_date] => 2019-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16283913 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/283913
Permuting in a matrix-vector processor Feb 24, 2019 Issued
Array ( [id] => 16772653 [patent_doc_number] => 10983757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Nanomaterial-based true random number generator [patent_app_type] => utility [patent_app_number] => 16/284046 [patent_app_country] => US [patent_app_date] => 2019-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2736 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16284046 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/284046
Nanomaterial-based true random number generator Feb 24, 2019 Issued
Array ( [id] => 16537255 [patent_doc_number] => 10879876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Resource conserving weighted overlap-add channelizer [patent_app_type] => utility [patent_app_number] => 16/283770 [patent_app_country] => US [patent_app_date] => 2019-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 7 [patent_no_of_words] => 10495 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16283770 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/283770
Resource conserving weighted overlap-add channelizer Feb 23, 2019 Issued
Array ( [id] => 14475069 [patent_doc_number] => 20190189180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => MEMCAPACITIVE CROSS-BAR ARRAY FOR DETERMINING A DOT PRODUCT [patent_app_type] => utility [patent_app_number] => 16/283513 [patent_app_country] => US [patent_app_date] => 2019-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16283513 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/283513
Memcapacitive cross-bar array for determining a dot product Feb 21, 2019 Issued
Array ( [id] => 16745057 [patent_doc_number] => 10970046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Random number generator compatible with complementary metal-oxide semiconductor technology [patent_app_type] => utility [patent_app_number] => 16/283006 [patent_app_country] => US [patent_app_date] => 2019-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5756 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16283006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/283006
Random number generator compatible with complementary metal-oxide semiconductor technology Feb 21, 2019 Issued
Array ( [id] => 16644198 [patent_doc_number] => 10922054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Apparatus and method [patent_app_type] => utility [patent_app_number] => 16/281260 [patent_app_country] => US [patent_app_date] => 2019-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 33 [patent_no_of_words] => 20667 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16281260 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/281260
Apparatus and method Feb 20, 2019 Issued
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