Eliseo Ramos Feliciano

Array ( [id] => 2998662 [patent_doc_number] => 05212783 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-18 [patent_title] => 'System which directionally sums signals for identifying and resolving timing inconsistencies' [patent_app_type] => 1 [patent_app_number] => 7/205811 [patent_app_country] => US [patent_app_date] => 1988-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 2133 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/212/05212783.pdf [firstpage_image] =>[orig_patent_app_number] => 205811 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2688556 [patent_doc_number] => 05067068 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-19 [patent_title] => 'Method for converting an iterative loop of a source program into parellelly executable object program portions' [patent_app_type] => 1 [patent_app_number] => 7/201772 [patent_app_country] => US [patent_app_date] => 1988-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 3610 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/067/05067068.pdf [firstpage_image] =>[orig_patent_app_number] => 201772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2860110 [patent_doc_number] => 05105424 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-14 [patent_title] => 'Inter-computer message routing system with each computer having separate routinng automata for each dimension of the network' [patent_app_type] => 1 [patent_app_number] => 7/201682 [patent_app_country] => US [patent_app_date] => 1988-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 8119 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/105/05105424.pdf [firstpage_image] =>[orig_patent_app_number] => 201682 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2677619 [patent_doc_number] => 04999769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-12 [patent_title] => 'System with plural clocks for bidirectional information exchange between DMA controller and I/O devices via DMA bus' [patent_app_type] => 1 [patent_app_number] => 7/197736 [patent_app_country] => US [patent_app_date] => 1988-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7472 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 790 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/999/04999769.pdf [firstpage_image] =>[orig_patent_app_number] => 197736 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2769146 [patent_doc_number] => 05060142 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'System which matches a received sequence of channel commands to sequence defining rules for predictively optimizing peripheral subsystem operations' [patent_app_type] => 1 [patent_app_number] => 7/197056 [patent_app_country] => US [patent_app_date] => 1988-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3445 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/060/05060142.pdf [firstpage_image] =>[orig_patent_app_number] => 197056 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2523904 [patent_doc_number] => 04852021 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-25 [patent_title] => 'Centralized command transfer control system for connecting processors which independently send and receive commands' [patent_app_type] => 1 [patent_app_number] => 7/198659 [patent_app_country] => US [patent_app_date] => 1988-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 3743 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/852/04852021.pdf [firstpage_image] =>[orig_patent_app_number] => 198659 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2799695 [patent_doc_number] => 05155848 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-13 [patent_title] => 'Method of searching and displaying selected data and for updating displayed data in a text editing system' [patent_app_type] => 1 [patent_app_number] => 7/195499 [patent_app_country] => US [patent_app_date] => 1988-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3101 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/155/05155848.pdf [firstpage_image] =>[orig_patent_app_number] => 195499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2939945 [patent_doc_number] => 05187799 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-16 [patent_title] => 'Arithmetic-stack processor which precalculates external stack address before needed by CPU for building high level language executing computers' [patent_app_type] => 1 [patent_app_number] => 7/194882 [patent_app_country] => US [patent_app_date] => 1988-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 9522 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/187/05187799.pdf [firstpage_image] =>[orig_patent_app_number] => 194882 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2788264 [patent_doc_number] => 05133064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-21 [patent_title] => 'Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices' [patent_app_type] => 1 [patent_app_number] => 7/184782 [patent_app_country] => US [patent_app_date] => 1988-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 53 [patent_no_of_words] => 14679 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/133/05133064.pdf [firstpage_image] =>[orig_patent_app_number] => 184782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2877103 [patent_doc_number] => 05097412 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-17 [patent_title] => 'Method for simulating the operation of programs in a distributed processing system' [patent_app_type] => 1 [patent_app_number] => 7/184395 [patent_app_country] => US [patent_app_date] => 1988-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 5203 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/097/05097412.pdf [firstpage_image] =>[orig_patent_app_number] => 184395 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2765190 [patent_doc_number] => 05043866 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-27 [patent_title] => 'Soft checkpointing system using log sequence numbers derived from stored data pages and log records for database recovery' [patent_app_type] => 1 [patent_app_number] => 7/179194 [patent_app_country] => US [patent_app_date] => 1988-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8033 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/043/05043866.pdf [firstpage_image] =>[orig_patent_app_number] => 179194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2849791 [patent_doc_number] => 05121477 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-09 [patent_title] => 'System for interactively creating action bar pull-down windows of a user interface for use at program run time' [patent_app_type] => 1 [patent_app_number] => 7/179468 [patent_app_country] => US [patent_app_date] => 1988-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 67 [patent_figures_cnt] => 68 [patent_no_of_words] => 8166 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/121/05121477.pdf [firstpage_image] =>[orig_patent_app_number] => 179468 [rel_patent_id] =>[rel_patent_doc_number] =>)