| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[id] => 2605789
[patent_doc_number] => 04965716
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-23
[patent_title] => 'Fast access priority queue for managing multiple messages at a communications node or managing multiple programs in a multiprogrammed data processor'
[patent_app_type] => 1
[patent_app_number] => 7/167265
[patent_app_country] => US
[patent_app_date] => 1988-03-11
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 167265
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/167265 | Fast access priority queue for managing multiple messages at a communications node or managing multiple programs in a multiprogrammed data processor | Mar 10, 1988 | Issued |
| 07/159185 | SYMMETRIC MULTI-PROCESSING CONTROL ARRANGEMENT | Feb 22, 1988 | Abandoned |
Array
(
[id] => 2869368
[patent_doc_number] => 05083266
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-01-21
[patent_title] => 'Microcomputer which enters sleep mode for a predetermined period of time on response to an activity of an input/output device'
[patent_app_type] => 1
[patent_app_number] => 7/137667
[patent_app_country] => US
[patent_app_date] => 1987-12-24
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/083/05083266.pdf
[firstpage_image] =>[orig_patent_app_number] => 137667
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/137667 | Microcomputer which enters sleep mode for a predetermined period of time on response to an activity of an input/output device | Dec 23, 1987 | Issued |
| 07/137174 | APPARATUS AND METHOD FOR CONTROLLING THE TRANSFER OF DIGITAL INFORMATION BETWEEN SERVICE PROCESSORS OF A COMPUTER | Dec 22, 1987 | Abandoned |
| 07/138246 | METHODS OF RETRIEVING DOCUMENT OBJECTS FROM AN INFORMATION PROCESSING SYSTEM | Dec 22, 1987 | Abandoned |
Array
(
[id] => 2524414
[patent_doc_number] => 04875159
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-10-17
[patent_title] => 'Version management system using plural control fields for synchronizing two versions of files in a multiprocessor system'
[patent_app_type] => 1
[patent_app_number] => 7/136859
[patent_app_country] => US
[patent_app_date] => 1987-12-22
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[pdf_file] => patents/04/875/04875159.pdf
[firstpage_image] =>[orig_patent_app_number] => 136859
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/136859 | Version management system using plural control fields for synchronizing two versions of files in a multiprocessor system | Dec 21, 1987 | Issued |
Array
(
[id] => 2741936
[patent_doc_number] => 05033001
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-16
[patent_title] => 'Dual mode memory read cycle time reduction system which generates read data clock signals from shifted and synchronized trigger signals'
[patent_app_type] => 1
[patent_app_number] => 7/134860
[patent_app_country] => US
[patent_app_date] => 1987-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/05/033/05033001.pdf
[firstpage_image] =>[orig_patent_app_number] => 134860
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/134860 | Dual mode memory read cycle time reduction system which generates read data clock signals from shifted and synchronized trigger signals | Dec 17, 1987 | Issued |
| 07/133679 | A DYNAMIC COMMUNICATION SYSTEM FOR COMMUNICATION AMONG SUBSYSTEMS | Dec 15, 1987 | Abandoned |
Array
(
[id] => 2716697
[patent_doc_number] => 05062043
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-29
[patent_title] => 'Information collecting and distributing system providing plural sources and destinations with synchronous alternating access to common storage'
[patent_app_type] => 1
[patent_app_number] => 7/133298
[patent_app_country] => US
[patent_app_date] => 1987-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/062/05062043.pdf
[firstpage_image] =>[orig_patent_app_number] => 133298
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/133298 | Information collecting and distributing system providing plural sources and destinations with synchronous alternating access to common storage | Dec 14, 1987 | Issued |
| 07/121965 | ADAPTING MULTIPLE VERSIONS OF SYSTEM COMMANDS TO A SINGLE OPERATING SYSTEM | Nov 16, 1987 | Abandoned |
Array
(
[id] => 2947255
[patent_doc_number] => 05230079
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-20
[patent_title] => 'Massively parallel array processing system with processors selectively accessing memory module locations using address in microword or in address register'
[patent_app_type] => 1
[patent_app_number] => 7/121563
[patent_app_country] => US
[patent_app_date] => 1987-11-16
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/230/05230079.pdf
[firstpage_image] =>[orig_patent_app_number] => 121563
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/121563 | Massively parallel array processing system with processors selectively accessing memory module locations using address in microword or in address register | Nov 15, 1987 | Issued |
Array
(
[id] => 2678126
[patent_doc_number] => 05073853
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-17
[patent_title] => 'Watchdog circuit for monitoring programs and detecting infinite loops using a changing multibit word for timer reset'
[patent_app_type] => 1
[patent_app_number] => 7/116415
[patent_app_country] => US
[patent_app_date] => 1987-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 5793
[patent_no_of_claims] => 13
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/073/05073853.pdf
[firstpage_image] =>[orig_patent_app_number] => 116415
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/116415 | Watchdog circuit for monitoring programs and detecting infinite loops using a changing multibit word for timer reset | Nov 1, 1987 | Issued |
| 07/112962 | BUS CONTROLLER WITH DIFFERENT MICROPROCESSOR AND BUS CLOCKS AND EMULATION OF DIFFERENT MICROPROCESSOR COMMAND SEQUENCES | Oct 22, 1987 | Abandoned |
Array
(
[id] => 2716499
[patent_doc_number] => 05001666
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-19
[patent_title] => 'Multiple interrupt tri-level microprocessor operating system'
[patent_app_type] => 1
[patent_app_number] => 7/109370
[patent_app_country] => US
[patent_app_date] => 1987-10-19
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[pdf_file] => patents/05/001/05001666.pdf
[firstpage_image] =>[orig_patent_app_number] => 109370
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/109370 | Multiple interrupt tri-level microprocessor operating system | Oct 18, 1987 | Issued |
Array
(
[id] => 2826453
[patent_doc_number] => 05123103
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-16
[patent_title] => 'Method and system of retrieving program specification and linking the specification by concept to retrieval request for reusing program parts'
[patent_app_type] => 1
[patent_app_number] => 7/109269
[patent_app_country] => US
[patent_app_date] => 1987-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[patent_no_of_words] => 10357
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[pdf_file] => patents/05/123/05123103.pdf
[firstpage_image] =>[orig_patent_app_number] => 109269
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/109269 | Method and system of retrieving program specification and linking the specification by concept to retrieval request for reusing program parts | Oct 14, 1987 | Issued |
Array
(
[id] => 2678245
[patent_doc_number] => 04954983
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-09-04
[patent_title] => 'Data driver for multiple mode buffered processor-peripheral data transfer with selective return of data to processor'
[patent_app_type] => 1
[patent_app_number] => 7/107203
[patent_app_country] => US
[patent_app_date] => 1987-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/04/954/04954983.pdf
[firstpage_image] =>[orig_patent_app_number] => 107203
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/107203 | Data driver for multiple mode buffered processor-peripheral data transfer with selective return of data to processor | Oct 12, 1987 | Issued |
Array
(
[id] => 2681731
[patent_doc_number] => 04984152
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-08
[patent_title] => 'System for controlling computer processing utilizing a multifunctional cursor with decoupling of pointer and image functionalities in space and time'
[patent_app_type] => 1
[patent_app_number] => 7/106587
[patent_app_country] => US
[patent_app_date] => 1987-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
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[pdf_file] => patents/04/984/04984152.pdf
[firstpage_image] =>[orig_patent_app_number] => 106587
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/106587 | System for controlling computer processing utilizing a multifunctional cursor with decoupling of pointer and image functionalities in space and time | Oct 5, 1987 | Issued |
| 07/104723 | SYSTEM FOR EXTRACTING LOW LEVEL CONCURRENCY FROM SERIAL INSTRUCTION STREAMS | Oct 1, 1987 | Abandoned |
Array
(
[id] => 2892916
[patent_doc_number] => 05109515
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-28
[patent_title] => 'User and application program transparent resource sharing multiple computer interface architecture with kernel process level transfer of user requested services'
[patent_app_type] => 1
[patent_app_number] => 7/101391
[patent_app_country] => US
[patent_app_date] => 1987-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
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[pdf_file] => patents/05/109/05109515.pdf
[firstpage_image] =>[orig_patent_app_number] => 101391
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/101391 | User and application program transparent resource sharing multiple computer interface architecture with kernel process level transfer of user requested services | Sep 27, 1987 | Issued |
| 07/100699 | INTEGRATED MULTIPLE BUFFER CONTROLLER FOR CONTROLLING BI-DIRECTIONAL DATA TRANSFER BETWEEN A PROCESSOR AND A DATA STORAGE DEVICE | Sep 23, 1987 | Abandoned |