Search

Eliseo Ramos Feliciano

Supervisory Patent Examiner (ID: 8243, Phone: (571)272-7925 , Office: P/2863 )

Most Active Art Unit
2617
Art Unit(s)
2857, 2617, 2681, 2895, 2745, 2817, 2687, 2682
Total Applications
285
Issued Applications
150
Pending Applications
66
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17252853 [patent_doc_number] => 11188342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-30 [patent_title] => Apparatus and method for speculative conditional move operation [patent_app_type] => utility [patent_app_number] => 16/837824 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 15292 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16837824 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/837824
Apparatus and method for speculative conditional move operation Mar 31, 2020 Issued
Array ( [id] => 17128536 [patent_doc_number] => 20210303305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => PROCESSOR HAVING LATENCY SHIFTER AND CONTROLLING METHOD USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/836864 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7364 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16836864 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/836864
Processor having latency shifter and controlling method using the same Mar 30, 2020 Issued
Array ( [id] => 16314582 [patent_doc_number] => 20200293320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => PROCESSOR WITH HARDWARE SUPPORTED MEMORY BUFFER OVERFLOW DETECTION [patent_app_type] => utility [patent_app_number] => 16/835441 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835441 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/835441
Processor with hardware supported memory buffer overflow detection Mar 30, 2020 Issued
Array ( [id] => 16363132 [patent_doc_number] => 20200319883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => INSTRUCTION AND LOGIC FOR TRACKING FETCH PERFORMANCE BOTTLENECKS [patent_app_type] => utility [patent_app_number] => 16/831007 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16831007 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/831007
Instruction and logic for tracking fetch performance bottlenecks Mar 25, 2020 Issued
Array ( [id] => 17016935 [patent_doc_number] => 11086574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Machine perception and dense algorithm integrated circuit [patent_app_type] => utility [patent_app_number] => 16/831423 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7036 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16831423 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/831423
Machine perception and dense algorithm integrated circuit Mar 25, 2020 Issued
Array ( [id] => 17209583 [patent_doc_number] => 11169956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Networked computer with embedded rings field [patent_app_type] => utility [patent_app_number] => 16/831590 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8543 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16831590 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/831590
Networked computer with embedded rings field Mar 25, 2020 Issued
Array ( [id] => 16314578 [patent_doc_number] => 20200293316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => COMPUTATIONAL MEMORY [patent_app_type] => utility [patent_app_number] => 16/815535 [patent_app_country] => US [patent_app_date] => 2020-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16815535 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/815535
Computational memory Mar 10, 2020 Issued
Array ( [id] => 17597798 [patent_doc_number] => 20220147372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => METHOD FOR VALIDATING A DATA FLOW SYSTEM [patent_app_type] => utility [patent_app_number] => 17/434242 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17434242 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/434242
Method for validating a data flow system Feb 25, 2020 Issued
Array ( [id] => 17817675 [patent_doc_number] => 11423291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Arithmetic device and arithmetic method [patent_app_type] => utility [patent_app_number] => 16/801025 [patent_app_country] => US [patent_app_date] => 2020-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 33 [patent_no_of_words] => 10690 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16801025 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/801025
Arithmetic device and arithmetic method Feb 24, 2020 Issued
Array ( [id] => 17565113 [patent_doc_number] => 20220129262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => DEVICE AND METHOD FOR CALCULATING ELEMENTARY FUNCTIONS USING SUCCESSIVE CUMULATIVE ROTATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/427843 [patent_app_country] => US [patent_app_date] => 2020-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9169 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17427843 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/427843
Device and method for calculating elementary functions using successive cumulative rotation circuit Feb 19, 2020 Issued
Array ( [id] => 16017695 [patent_doc_number] => 20200183691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => ENHANCED PROTECTION OF PROCESSORS FROM A BUFFER OVERFLOW ATTACK [patent_app_type] => utility [patent_app_number] => 16/792432 [patent_app_country] => US [patent_app_date] => 2020-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8136 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16792432 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/792432
Enhanced protection of processors from a buffer overflow attack Feb 16, 2020 Issued
Array ( [id] => 17209435 [patent_doc_number] => 11169807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => System and method for dynamic accuracy and threshold control for branch classification [patent_app_type] => utility [patent_app_number] => 16/787141 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9678 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16787141 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/787141
System and method for dynamic accuracy and threshold control for branch classification Feb 10, 2020 Issued
Array ( [id] => 16993980 [patent_doc_number] => 20210232400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => BRANCH PREDICTOR [patent_app_type] => utility [patent_app_number] => 16/775431 [patent_app_country] => US [patent_app_date] => 2020-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13935 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16775431 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/775431
Branch predictor Jan 28, 2020 Issued
Array ( [id] => 16994782 [patent_doc_number] => 20210233202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => SYSTEM AND METHOD FOR CONVOLVING AN IMAGE [patent_app_type] => utility [patent_app_number] => 16/775225 [patent_app_country] => US [patent_app_date] => 2020-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16775225 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/775225
System and method for convolving an image Jan 27, 2020 Issued
Array ( [id] => 17364904 [patent_doc_number] => 11231925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => Data processing device [patent_app_type] => utility [patent_app_number] => 16/748189 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 8034 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16748189 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/748189
Data processing device Jan 20, 2020 Issued
Array ( [id] => 16879811 [patent_doc_number] => 11029958 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-08 [patent_title] => Apparatuses, methods, and systems for configurable operand size operations in an operation configurable spatial accelerator [patent_app_type] => utility [patent_app_number] => 16/729372 [patent_app_country] => US [patent_app_date] => 2019-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 104 [patent_figures_cnt] => 141 [patent_no_of_words] => 91335 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729372 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729372
Apparatuses, methods, and systems for configurable operand size operations in an operation configurable spatial accelerator Dec 27, 2019 Issued
Array ( [id] => 16439042 [patent_doc_number] => 20200356368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => Vector Processor for Heterogeneous Data Streams [patent_app_type] => utility [patent_app_number] => 16/729253 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729253 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729253
Vector processor for heterogeneous data streams Dec 26, 2019 Issued
Array ( [id] => 15837263 [patent_doc_number] => 20200133914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => Synchronization in a Multi-Tile, Multi-Chip Processing Arrangement [patent_app_type] => utility [patent_app_number] => 16/725313 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26044 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725313 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725313
Synchronization in a multi-tile, multi-chip processing arrangement Dec 22, 2019 Issued
Array ( [id] => 17667115 [patent_doc_number] => 11360812 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-14 [patent_title] => Operating system apparatus for micro-architectural state isolation [patent_app_type] => utility [patent_app_number] => 16/723418 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8039 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723418 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/723418
Operating system apparatus for micro-architectural state isolation Dec 19, 2019 Issued
Array ( [id] => 17924583 [patent_doc_number] => 11467831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => System and method for pipelined time-domain computing using time-domain flip-flops and its application in time-series analysis [patent_app_type] => utility [patent_app_number] => 17/311849 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 2754 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17311849 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/311849
System and method for pipelined time-domain computing using time-domain flip-flops and its application in time-series analysis Dec 17, 2019 Issued
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