Eliseo Ramos Feliciano

Array ( [id] => 8260175 [patent_doc_number] => 08209687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'Method and system for evaluating virtualized environments' [patent_app_type] => utility [patent_app_number] => 12/201323 [patent_app_country] => US [patent_app_date] => 2008-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 57 [patent_no_of_words] => 21170 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12201323 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6617002 [patent_doc_number] => 20100049953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'DATA CACHE RECEIVE FLOP BYPASS' [patent_app_type] => utility [patent_app_number] => 12/195053 [patent_app_country] => US [patent_app_date] => 2008-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6590 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20100049953.pdf [firstpage_image] =>[orig_patent_app_number] => 12195053 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5339165 [patent_doc_number] => 20090055629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'Instruction length determination device and method using concatenate bits to determine an instruction length in a multi-mode processor' [patent_app_type] => utility [patent_app_number] => 12/222887 [patent_app_country] => US [patent_app_date] => 2008-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2799 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20090055629.pdf [firstpage_image] =>[orig_patent_app_number] => 12222887 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6617074 [patent_doc_number] => 20100049958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'METHOD FOR EXECUTING AN INSTRUCTION LOOPS AND A DEVICE HAVING INSTRUCTION LOOP EXECUTION CAPABILITIES' [patent_app_type] => utility [patent_app_number] => 12/194286 [patent_app_country] => US [patent_app_date] => 2008-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4316 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20100049958.pdf [firstpage_image] =>[orig_patent_app_number] => 12194286 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4447450 [patent_doc_number] => 07930522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-19 [patent_title] => 'Method for speculative execution of instructions and a device having speculative execution capabilities' [patent_app_type] => utility [patent_app_number] => 12/194279 [patent_app_country] => US [patent_app_date] => 2008-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4506 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/930/07930522.pdf [firstpage_image] =>[orig_patent_app_number] => 12194279 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5325830 [patent_doc_number] => 20090063820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'Application Specific Instruction Set Processor for Digital Radio Processor Receiving Chain Signal Processing' [patent_app_type] => utility [patent_app_number] => 12/193455 [patent_app_country] => US [patent_app_date] => 2008-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12734 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20090063820.pdf [firstpage_image] =>[orig_patent_app_number] => 12193455 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7524983 [patent_doc_number] => 08028153 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-27 [patent_title] => 'Data dependent instruction decode' [patent_app_type] => utility [patent_app_number] => 12/191337 [patent_app_country] => US [patent_app_date] => 2008-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 10931 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/028/08028153.pdf [firstpage_image] =>[orig_patent_app_number] => 12191337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4499613 [patent_doc_number] => 07904702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Compound instructions in a multi-threaded processor' [patent_app_type] => utility [patent_app_number] => 12/228669 [patent_app_country] => US [patent_app_date] => 2008-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3282 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/904/07904702.pdf [firstpage_image] =>[orig_patent_app_number] => 12228669 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8273101 [patent_doc_number] => 08214623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Extending operations of an application in a data processing system' [patent_app_type] => utility [patent_app_number] => 12/184973 [patent_app_country] => US [patent_app_date] => 2008-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7262 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12184973 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5523322 [patent_doc_number] => 20090031303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'METHOD FOR SECURING THE EXECUTION OF VIRTUAL MACHINES' [patent_app_type] => utility [patent_app_number] => 12/178333 [patent_app_country] => US [patent_app_date] => 2008-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2776 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20090031303.pdf [firstpage_image] =>[orig_patent_app_number] => 12178333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 198468 [patent_doc_number] => 07636836 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-22 [patent_title] => 'Fetch and dispatch disassociation apparatus for multistreaming processors' [patent_app_type] => utility [patent_app_number] => 12/173560 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2144 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/636/07636836.pdf [firstpage_image] =>[orig_patent_app_number] => 12173560 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9063067 [patent_doc_number] => 08549522 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-01 [patent_title] => 'Automated testing environment framework for testing data storage systems' [patent_app_type] => utility [patent_app_number] => 12/173238 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6843 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12173238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9102671 [patent_doc_number] => 08566565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Microprocessor with multiple operating modes dynamically configurable by a device driver based on currently running applications' [patent_app_type] => utility [patent_app_number] => 12/170591 [patent_app_country] => US [patent_app_date] => 2008-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4064 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12170591 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5298231 [patent_doc_number] => 20090013157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-08 [patent_title] => 'Management of Software Implemented Services in Processor-Based Devices' [patent_app_type] => utility [patent_app_number] => 12/163737 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5502 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20090013157.pdf [firstpage_image] =>[orig_patent_app_number] => 12163737 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5948581 [patent_doc_number] => 20110107070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'PATCHING OF A READ-ONLY MEMORY' [patent_app_type] => utility [patent_app_number] => 12/997087 [patent_app_country] => US [patent_app_date] => 2008-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5412 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20110107070.pdf [firstpage_image] =>[orig_patent_app_number] => 12997087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4761204 [patent_doc_number] => 20080313430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'METHOD AND SYSTEM FOR INCREASING QUANTUM COMPUTER PROCESSING SPEED USING DIGITAL CO-PROCESSOR' [patent_app_type] => utility [patent_app_number] => 12/138292 [patent_app_country] => US [patent_app_date] => 2008-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8482 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0313/20080313430.pdf [firstpage_image] =>[orig_patent_app_number] => 12138292 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5292111 [patent_doc_number] => 20090024841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'Register File Backup Queue' [patent_app_type] => utility [patent_app_number] => 12/137017 [patent_app_country] => US [patent_app_date] => 2008-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3729 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20090024841.pdf [firstpage_image] =>[orig_patent_app_number] => 12137017 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4589850 [patent_doc_number] => 07831816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Non-destructive sideband reading of processor state information' [patent_app_type] => utility [patent_app_number] => 12/130990 [patent_app_country] => US [patent_app_date] => 2008-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2740 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/831/07831816.pdf [firstpage_image] =>[orig_patent_app_number] => 12130990 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5305597 [patent_doc_number] => 20090300249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'SELECTIVE MISR DATA ACCUMULATION DURING EXCEPTION PROCESSING' [patent_app_type] => utility [patent_app_number] => 12/130012 [patent_app_country] => US [patent_app_date] => 2008-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10585 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20090300249.pdf [firstpage_image] =>[orig_patent_app_number] => 12130012 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6651500 [patent_doc_number] => 20100228949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-09 [patent_title] => 'PROCESSORS' [patent_app_type] => utility [patent_app_number] => 12/601999 [patent_app_country] => US [patent_app_date] => 2008-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7141 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20100228949.pdf [firstpage_image] =>[orig_patent_app_number] => 12601999 [rel_patent_id] =>[rel_patent_doc_number] =>)