Eliseo Ramos Feliciano

Array ( [id] => 5571522 [patent_doc_number] => 20090254901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'SYSTEMS AND METHODS FOR USING OPERATING SYSTEM (OS) VIRTUALISATION FOR MINIMIZING POWER CONSUMPTION IN MOBILE PHONES' [patent_app_type] => utility [patent_app_number] => 12/099257 [patent_app_country] => US [patent_app_date] => 2008-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4249 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20090254901.pdf [firstpage_image] =>[orig_patent_app_number] => 12099257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5571524 [patent_doc_number] => 20090254903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'Open framework to interface business applications and content management in media production and distribution environment' [patent_app_type] => utility [patent_app_number] => 12/080998 [patent_app_country] => US [patent_app_date] => 2008-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4007 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20090254903.pdf [firstpage_image] =>[orig_patent_app_number] => 12080998 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8023129 [patent_doc_number] => 08141084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Managing preemption in a parallel computing system' [patent_app_type] => utility [patent_app_number] => 12/098868 [patent_app_country] => US [patent_app_date] => 2008-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4967 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/141/08141084.pdf [firstpage_image] =>[orig_patent_app_number] => 12098868 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4684193 [patent_doc_number] => 20080250419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'METHOD AND SYSTEM FOR MANAGING RESOURCE CONNECTIONS' [patent_app_type] => utility [patent_app_number] => 12/098620 [patent_app_country] => US [patent_app_date] => 2008-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9102 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0250/20080250419.pdf [firstpage_image] =>[orig_patent_app_number] => 12098620 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8273317 [patent_doc_number] => 08214839 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-07-03 [patent_title] => 'Streaming distribution of file data based on predicted need' [patent_app_type] => utility [patent_app_number] => 12/059777 [patent_app_country] => US [patent_app_date] => 2008-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2223 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12059777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5476199 [patent_doc_number] => 20090249345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'Operating System Fast Run Command' [patent_app_type] => utility [patent_app_number] => 12/059311 [patent_app_country] => US [patent_app_date] => 2008-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4324 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20090249345.pdf [firstpage_image] =>[orig_patent_app_number] => 12059311 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8923911 [patent_doc_number] => 08489861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-16 [patent_title] => 'Split embedded DRAM processor' [patent_app_type] => utility [patent_app_number] => 12/057792 [patent_app_country] => US [patent_app_date] => 2008-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 15349 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12057792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4841585 [patent_doc_number] => 20080282071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'Microprocessor and register saving method' [patent_app_type] => utility [patent_app_number] => 12/076857 [patent_app_country] => US [patent_app_date] => 2008-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7236 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0282/20080282071.pdf [firstpage_image] =>[orig_patent_app_number] => 12076857 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8985098 [patent_doc_number] => 08516228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Supporting partial recycle in a pipelined microprocessor' [patent_app_type] => utility [patent_app_number] => 12/051486 [patent_app_country] => US [patent_app_date] => 2008-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2838 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12051486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8623241 [patent_doc_number] => 08356162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-15 [patent_title] => 'Execution unit with data dependent conditional write instructions' [patent_app_type] => utility [patent_app_number] => 12/050721 [patent_app_country] => US [patent_app_date] => 2008-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11979 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12050721 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7517849 [patent_doc_number] => 08041931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Branch prediction apparatus, systems, and methods' [patent_app_type] => utility [patent_app_number] => 12/046066 [patent_app_country] => US [patent_app_date] => 2008-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5361 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/041/08041931.pdf [firstpage_image] =>[orig_patent_app_number] => 12046066 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4590953 [patent_doc_number] => 07827388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-02 [patent_title] => 'Apparatus for adjusting instruction thread priority in a multi-thread processor' [patent_app_type] => utility [patent_app_number] => 12/044846 [patent_app_country] => US [patent_app_date] => 2008-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 9330 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/827/07827388.pdf [firstpage_image] =>[orig_patent_app_number] => 12044846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4530426 [patent_doc_number] => 07913068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'System and method for providing asynchronous dynamic millicode entry prediction' [patent_app_type] => utility [patent_app_number] => 12/035109 [patent_app_country] => US [patent_app_date] => 2008-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/913/07913068.pdf [firstpage_image] =>[orig_patent_app_number] => 12035109 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4469941 [patent_doc_number] => 07882338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Method, system and computer program product for an implicit predicted return from a predicted subroutine' [patent_app_type] => utility [patent_app_number] => 12/034066 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/882/07882338.pdf [firstpage_image] =>[orig_patent_app_number] => 12034066 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5393371 [patent_doc_number] => 20090210684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'METHODS, SYSTEMS, AND COMPUTER PROGRAM PRODUCTS FOR RECOVERING FROM BRANCH PREDICTION LATENCY' [patent_app_type] => utility [patent_app_number] => 12/034112 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4461 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20090210684.pdf [firstpage_image] =>[orig_patent_app_number] => 12034112 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4590959 [patent_doc_number] => 07827390 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-02 [patent_title] => 'Microprocessor with private microcode RAM' [patent_app_type] => utility [patent_app_number] => 12/034503 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 6136 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/827/07827390.pdf [firstpage_image] =>[orig_patent_app_number] => 12034503 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4530422 [patent_doc_number] => 07913067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Method and system for overlapping execution of instructions through non-uniform execution pipelines in an in-order processor' [patent_app_type] => utility [patent_app_number] => 12/034084 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4620 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/913/07913067.pdf [firstpage_image] =>[orig_patent_app_number] => 12034084 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5393362 [patent_doc_number] => 20090210675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'METHOD AND SYSTEM FOR EARLY INSTRUCTION TEXT BASED OPERAND STORE COMPARE REJECT AVOIDANCE' [patent_app_type] => utility [patent_app_number] => 12/034042 [patent_app_country] => US [patent_app_date] => 2008-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20090210675.pdf [firstpage_image] =>[orig_patent_app_number] => 12034042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4787678 [patent_doc_number] => 20080141007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-12 [patent_title] => 'Boolean Processor' [patent_app_type] => utility [patent_app_number] => 12/033644 [patent_app_country] => US [patent_app_date] => 2008-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 15509 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20080141007.pdf [firstpage_image] =>[orig_patent_app_number] => 12033644 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5393370 [patent_doc_number] => 20090210683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'METHOD AND APPARATUS FOR RECOVERING FROM BRANCH MISPREDICTION' [patent_app_type] => utility [patent_app_number] => 12/033626 [patent_app_country] => US [patent_app_date] => 2008-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3814 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20090210683.pdf [firstpage_image] =>[orig_patent_app_number] => 12033626 [rel_patent_id] =>[rel_patent_doc_number] =>)