Eliseo Ramos Feliciano

Array ( [id] => 534666 [patent_doc_number] => 07194604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'Address generation interlock resolution under runahead execution' [patent_app_type] => utility [patent_app_number] => 10/926481 [patent_app_country] => US [patent_app_date] => 2004-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3074 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/194/07194604.pdf [firstpage_image] =>[orig_patent_app_number] => 10926481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 518454 [patent_doc_number] => 07203819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Program processing device' [patent_app_type] => utility [patent_app_number] => 10/919126 [patent_app_country] => US [patent_app_date] => 2004-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3878 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203819.pdf [firstpage_image] =>[orig_patent_app_number] => 10919126 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7213616 [patent_doc_number] => 20050044259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Resolving crossing requests in multi-node configurations' [patent_app_type] => utility [patent_app_number] => 10/917682 [patent_app_country] => US [patent_app_date] => 2004-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5954 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20050044259.pdf [firstpage_image] =>[orig_patent_app_number] => 10917682 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 261851 [patent_doc_number] => 07574585 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-08-11 [patent_title] => 'Implementing software breakpoints and debugger therefor' [patent_app_type] => utility [patent_app_number] => 10/913614 [patent_app_country] => US [patent_app_date] => 2004-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4495 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/574/07574585.pdf [firstpage_image] =>[orig_patent_app_number] => 10913614 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7052179 [patent_doc_number] => 20050187898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-25 [patent_title] => 'Data Lookup architecture' [patent_app_type] => utility [patent_app_number] => 10/909901 [patent_app_country] => US [patent_app_date] => 2004-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2600 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20050187898.pdf [firstpage_image] =>[orig_patent_app_number] => 10909901 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 518498 [patent_doc_number] => 07203822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Unprivileged context management' [patent_app_type] => utility [patent_app_number] => 10/909802 [patent_app_country] => US [patent_app_date] => 2004-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 8844 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203822.pdf [firstpage_image] =>[orig_patent_app_number] => 10909802 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7451819 [patent_doc_number] => 20040268348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'High speed virtual machine and compiler' [patent_app_type] => new [patent_app_number] => 10/899920 [patent_app_country] => US [patent_app_date] => 2004-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 92 [patent_figures_cnt] => 92 [patent_no_of_words] => 32594 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20040268348.pdf [firstpage_image] =>[orig_patent_app_number] => 10899920 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 925053 [patent_doc_number] => 07320064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-15 [patent_title] => 'Reconfigurable computing architecture for space applications' [patent_app_type] => utility [patent_app_number] => 10/897888 [patent_app_country] => US [patent_app_date] => 2004-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6188 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/320/07320064.pdf [firstpage_image] =>[orig_patent_app_number] => 10897888 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7084928 [patent_doc_number] => 20050050308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'System and method for generating multi-way branches' [patent_app_type] => utility [patent_app_number] => 10/893401 [patent_app_country] => US [patent_app_date] => 2004-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4245 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20050050308.pdf [firstpage_image] =>[orig_patent_app_number] => 10893401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5795027 [patent_doc_number] => 20060015708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Microprocessor with branch target determination in decoded microinstruction code sequence' [patent_app_type] => utility [patent_app_number] => 10/891166 [patent_app_country] => US [patent_app_date] => 2004-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5631 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20060015708.pdf [firstpage_image] =>[orig_patent_app_number] => 10891166 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5795026 [patent_doc_number] => 20060015707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Microprocessor with customer code store' [patent_app_type] => utility [patent_app_number] => 10/891165 [patent_app_country] => US [patent_app_date] => 2004-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5542 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20060015707.pdf [firstpage_image] =>[orig_patent_app_number] => 10891165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 438412 [patent_doc_number] => 07263601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-28 [patent_title] => 'Sequencer unit with instruction buffering' [patent_app_type] => utility [patent_app_number] => 10/890702 [patent_app_country] => US [patent_app_date] => 2004-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5150 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/263/07263601.pdf [firstpage_image] =>[orig_patent_app_number] => 10890702 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7449499 [patent_doc_number] => 20040268136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Microcomputer and microcomputer system' [patent_app_type] => new [patent_app_number] => 10/887843 [patent_app_country] => US [patent_app_date] => 2004-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 27987 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20040268136.pdf [firstpage_image] =>[orig_patent_app_number] => 10887843 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6979082 [patent_doc_number] => 20050288800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Accelerating computational algorithms using reconfigurable computing technologies' [patent_app_type] => utility [patent_app_number] => 10/878979 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4593 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20050288800.pdf [firstpage_image] =>[orig_patent_app_number] => 10878979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6979565 [patent_doc_number] => 20050289283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Autonomic computing utilizing a sequestered processing resource on a host CPU' [patent_app_type] => utility [patent_app_number] => 10/877483 [patent_app_country] => US [patent_app_date] => 2004-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3365 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20050289283.pdf [firstpage_image] =>[orig_patent_app_number] => 10877483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20234 [patent_doc_number] => RE041703 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2010-09-14 [patent_title] => 'Methods and apparatus for efficient synchronous MIMD operations with IVLIW PE-TO-PE communication' [patent_app_type] => reissue [patent_app_number] => 10/872995 [patent_app_country] => US [patent_app_date] => 2004-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8662 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/041/RE041703.pdf [firstpage_image] =>[orig_patent_app_number] => 10872995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7358686 [patent_doc_number] => 20040250047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Method and apparatus for a shift register based interconnection for a massively parallel processor array' [patent_app_type] => new [patent_app_number] => 10/863202 [patent_app_country] => US [patent_app_date] => 2004-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3163 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0250/20040250047.pdf [firstpage_image] =>[orig_patent_app_number] => 10863202 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7300398 [patent_doc_number] => 20040215935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Method and system for substantially registerless processing' [patent_app_type] => new [patent_app_number] => 10/846070 [patent_app_country] => US [patent_app_date] => 2004-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6924 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20040215935.pdf [firstpage_image] =>[orig_patent_app_number] => 10846070 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 885593 [patent_doc_number] => 07356669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-08 [patent_title] => 'Processing system and method for transmitting data' [patent_app_type] => utility [patent_app_number] => 10/555403 [patent_app_country] => US [patent_app_date] => 2004-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2581 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/356/07356669.pdf [firstpage_image] =>[orig_patent_app_number] => 10555403 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 600326 [patent_doc_number] => 07437536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Systems and methods for task migration' [patent_app_type] => utility [patent_app_number] => 10/838050 [patent_app_country] => US [patent_app_date] => 2004-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8490 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/437/07437536.pdf [firstpage_image] =>[orig_patent_app_number] => 10838050 [rel_patent_id] =>[rel_patent_doc_number] =>)