
Eliseo Ramos Feliciano
Supervisory Patent Examiner (ID: 8243, Phone: (571)272-7925 , Office: P/2863 )
| Most Active Art Unit | 2617 |
| Art Unit(s) | 2857, 2617, 2681, 2895, 2745, 2817, 2687, 2682 |
| Total Applications | 285 |
| Issued Applications | 150 |
| Pending Applications | 66 |
| Abandoned Applications | 73 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7105729
[patent_doc_number] => 20010004757
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-06-21
[patent_title] => 'Processor and method of controlling the same'
[patent_app_type] => new-utility
[patent_app_number] => 09/736357
[patent_app_country] => US
[patent_app_date] => 2000-12-15
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[pdf_file] => publications/A1/0004/20010004757.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/736357 | Processor and method of controlling the same | Dec 14, 2000 | Issued |
Array
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[patent_doc_number] => 20020169946
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[patent_kind] => A1
[patent_issue_date] => 2002-11-14
[patent_title] => 'Methods, systems, and computer program products for compressing a computer program based on a compression criterion and executing the compressed program'
[patent_app_type] => new
[patent_app_number] => 09/736682
[patent_app_country] => US
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Array
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[patent_doc_number] => 06973561
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[patent_issue_date] => 2005-12-06
[patent_title] => 'Processor pipeline stall based on data register status'
[patent_app_type] => utility
[patent_app_number] => 09/729508
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/729508 | Processor pipeline stall based on data register status | Dec 3, 2000 | Issued |
Array
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[patent_doc_number] => 06754809
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[patent_issue_date] => 2004-06-22
[patent_title] => 'Data processing apparatus with indirect register file access'
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[patent_app_number] => 09/713442
[patent_app_country] => US
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Array
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[patent_doc_number] => 07035998
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[patent_issue_date] => 2006-04-25
[patent_title] => 'Clustering stream and/or instruction queues for multi-streaming processors'
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Array
(
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[patent_doc_number] => 07139898
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[patent_title] => 'Fetch and dispatch disassociation apparatus for multistreaming processors'
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Array
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Array
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Array
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[id] => 1184825
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Array
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[id] => 1506007
[patent_doc_number] => 06487651
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[patent_issue_date] => 2002-11-26
[patent_title] => 'MIMD arrangement of SIMD machines'
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Array
(
[id] => 1377378
[patent_doc_number] => 06578139
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[patent_issue_date] => 2003-06-10
[patent_title] => 'Processor architecture scheme which uses virtual address registers to implement different addressing modes and method therefor'
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Array
(
[id] => 1552984
[patent_doc_number] => 06446191
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| 09/672424 | COMPLEX INSTRUCTION SET COMPUTER | Sep 27, 2000 | Abandoned |
Array
(
[id] => 481354
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Array
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Array
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Array
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