Search

Eliseo Ramos Feliciano

Supervisory Patent Examiner (ID: 8243, Phone: (571)272-7925 , Office: P/2863 )

Most Active Art Unit
2617
Art Unit(s)
2857, 2617, 2681, 2895, 2745, 2817, 2687, 2682
Total Applications
285
Issued Applications
150
Pending Applications
66
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4177908 [patent_doc_number] => 06108766 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Structure of processor having a plurality of main processors and sub processors, and a method for sharing the sub processors' [patent_app_type] => 1 [patent_app_number] => 9/131891 [patent_app_country] => US [patent_app_date] => 1998-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5357 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108766.pdf [firstpage_image] =>[orig_patent_app_number] => 131891 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/131891
Structure of processor having a plurality of main processors and sub processors, and a method for sharing the sub processors Aug 9, 1998 Issued
Array ( [id] => 4260411 [patent_doc_number] => 06167500 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Mechanism for queuing store data and method therefor' [patent_app_type] => 1 [patent_app_number] => 9/131789 [patent_app_country] => US [patent_app_date] => 1998-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4550 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/167/06167500.pdf [firstpage_image] =>[orig_patent_app_number] => 131789 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/131789
Mechanism for queuing store data and method therefor Aug 9, 1998 Issued
Array ( [id] => 4126887 [patent_doc_number] => 06058467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Standard cell, 4-cycle, 8-bit microcontroller' [patent_app_type] => 1 [patent_app_number] => 9/130773 [patent_app_country] => US [patent_app_date] => 1998-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4646 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/058/06058467.pdf [firstpage_image] =>[orig_patent_app_number] => 130773 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/130773
Standard cell, 4-cycle, 8-bit microcontroller Aug 6, 1998 Issued
Array ( [id] => 4156068 [patent_doc_number] => 06122720 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Coarse-grained look-up table architecture' [patent_app_type] => 1 [patent_app_number] => 9/130874 [patent_app_country] => US [patent_app_date] => 1998-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 12303 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/122/06122720.pdf [firstpage_image] =>[orig_patent_app_number] => 130874 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/130874
Coarse-grained look-up table architecture Aug 6, 1998 Issued
Array ( [id] => 4255344 [patent_doc_number] => 06119223 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Map unit having rapid misprediction recovery' [patent_app_type] => 1 [patent_app_number] => 9/127294 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 16799 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/119/06119223.pdf [firstpage_image] =>[orig_patent_app_number] => 127294 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/127294
Map unit having rapid misprediction recovery Jul 30, 1998 Issued
Array ( [id] => 4202547 [patent_doc_number] => 06094717 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Computer processor with a replay system having a plurality of checkers' [patent_app_type] => 1 [patent_app_number] => 9/126658 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5917 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/094/06094717.pdf [firstpage_image] =>[orig_patent_app_number] => 126658 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/126658
Computer processor with a replay system having a plurality of checkers Jul 30, 1998 Issued
Array ( [id] => 4155065 [patent_doc_number] => 06122656 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Processor configured to map logical register numbers to physical register numbers using virtual register numbers' [patent_app_type] => 1 [patent_app_number] => 9/127100 [patent_app_country] => US [patent_app_date] => 1998-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 16544 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/122/06122656.pdf [firstpage_image] =>[orig_patent_app_number] => 127100 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/127100
Processor configured to map logical register numbers to physical register numbers using virtual register numbers Jul 30, 1998 Issued
Array ( [id] => 4177926 [patent_doc_number] => 06108767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Method, apparatus and computer program product for selecting a predictor to minimize exception traps from a top-of-stack cache' [patent_app_type] => 1 [patent_app_number] => 9/126560 [patent_app_country] => US [patent_app_date] => 1998-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5985 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108767.pdf [firstpage_image] =>[orig_patent_app_number] => 126560 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/126560
Method, apparatus and computer program product for selecting a predictor to minimize exception traps from a top-of-stack cache Jul 29, 1998 Issued
Array ( [id] => 4311816 [patent_doc_number] => 06237038 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'Method of data communication and system for carrying out the method' [patent_app_type] => 1 [patent_app_number] => 9/123785 [patent_app_country] => US [patent_app_date] => 1998-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 6525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/237/06237038.pdf [firstpage_image] =>[orig_patent_app_number] => 123785 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/123785
Method of data communication and system for carrying out the method Jul 28, 1998 Issued
Array ( [id] => 4401520 [patent_doc_number] => 06279031 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Electronic document circulating system' [patent_app_type] => 1 [patent_app_number] => 9/124235 [patent_app_country] => US [patent_app_date] => 1998-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 11743 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/279/06279031.pdf [firstpage_image] =>[orig_patent_app_number] => 124235 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/124235
Electronic document circulating system Jul 28, 1998 Issued
Array ( [id] => 4260472 [patent_doc_number] => 06167504 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Method, apparatus and computer program product for processing stack related exception traps' [patent_app_type] => 1 [patent_app_number] => 9/122172 [patent_app_country] => US [patent_app_date] => 1998-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4741 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/167/06167504.pdf [firstpage_image] =>[orig_patent_app_number] => 122172 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/122172
Method, apparatus and computer program product for processing stack related exception traps Jul 23, 1998 Issued
Array ( [id] => 1587536 [patent_doc_number] => 06425085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-07-23 [patent_title] => 'Terminal device and method for requesting user certification from host computer' [patent_app_type] => B2 [patent_app_number] => 09/116921 [patent_app_country] => US [patent_app_date] => 1998-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2926 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/425/06425085.pdf [firstpage_image] =>[orig_patent_app_number] => 09116921 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/116921
Terminal device and method for requesting user certification from host computer Jul 16, 1998 Issued
Array ( [id] => 4280078 [patent_doc_number] => 06205537 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Mechanism for dynamically adapting the complexity of a microprocessor' [patent_app_type] => 1 [patent_app_number] => 9/116876 [patent_app_country] => US [patent_app_date] => 1998-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 8054 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/205/06205537.pdf [firstpage_image] =>[orig_patent_app_number] => 116876 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/116876
Mechanism for dynamically adapting the complexity of a microprocessor Jul 15, 1998 Issued
Array ( [id] => 4421971 [patent_doc_number] => 06173324 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Method and apparatus for fault detection and isolation in data' [patent_app_type] => 1 [patent_app_number] => 9/116129 [patent_app_country] => US [patent_app_date] => 1998-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5744 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/173/06173324.pdf [firstpage_image] =>[orig_patent_app_number] => 116129 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/116129
Method and apparatus for fault detection and isolation in data Jul 14, 1998 Issued
Array ( [id] => 4270414 [patent_doc_number] => 06223272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Test vector verification system' [patent_app_type] => 1 [patent_app_number] => 9/116062 [patent_app_country] => US [patent_app_date] => 1998-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2508 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/223/06223272.pdf [firstpage_image] =>[orig_patent_app_number] => 116062 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/116062
Test vector verification system Jul 14, 1998 Issued
Array ( [id] => 4202533 [patent_doc_number] => 06094716 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Register renaming in which moves are accomplished by swapping rename tags' [patent_app_type] => 1 [patent_app_number] => 9/115115 [patent_app_country] => US [patent_app_date] => 1998-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 16023 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/094/06094716.pdf [firstpage_image] =>[orig_patent_app_number] => 115115 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/115115
Register renaming in which moves are accomplished by swapping rename tags Jul 13, 1998 Issued
Array ( [id] => 4101122 [patent_doc_number] => 06163835 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Method and apparatus for transferring data over a processor interface bus' [patent_app_type] => 1 [patent_app_number] => 9/110351 [patent_app_country] => US [patent_app_date] => 1998-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4654 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163835.pdf [firstpage_image] =>[orig_patent_app_number] => 110351 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/110351
Method and apparatus for transferring data over a processor interface bus Jul 5, 1998 Issued
Array ( [id] => 4207879 [patent_doc_number] => 06044223 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Object code allocation in multiple systems' [patent_app_type] => 1 [patent_app_number] => 9/108103 [patent_app_country] => US [patent_app_date] => 1998-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5616 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/044/06044223.pdf [firstpage_image] =>[orig_patent_app_number] => 108103 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/108103
Object code allocation in multiple systems Jun 29, 1998 Issued
Array ( [id] => 4063734 [patent_doc_number] => 05964865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Object code allocation in multiple processor systems' [patent_app_type] => 1 [patent_app_number] => 9/107862 [patent_app_country] => US [patent_app_date] => 1998-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5617 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/964/05964865.pdf [firstpage_image] =>[orig_patent_app_number] => 107862 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/107862
Object code allocation in multiple processor systems Jun 29, 1998 Issued
Array ( [id] => 4310347 [patent_doc_number] => 06212617 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Parallel processing method and system using a lazy parallel data type to reduce inter-processor communication' [patent_app_type] => 1 [patent_app_number] => 9/108111 [patent_app_country] => US [patent_app_date] => 1998-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 19759 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/212/06212617.pdf [firstpage_image] =>[orig_patent_app_number] => 108111 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/108111
Parallel processing method and system using a lazy parallel data type to reduce inter-processor communication Jun 29, 1998 Issued
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