Eliseo Ramos Feliciano

Array ( [id] => 4424794 [patent_doc_number] => 06230253 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Executing partial-width packed data instructions' [patent_app_type] => 1 [patent_app_number] => 9/053127 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 8836 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/230/06230253.pdf [firstpage_image] =>[orig_patent_app_number] => 053127 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4391845 [patent_doc_number] => 06289434 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Apparatus and method of implementing systems on silicon using dynamic-adaptive run-time reconfigurable circuits for processing multiple, independent data and control streams of varying rates' [patent_app_type] => 1 [patent_app_number] => 9/032530 [patent_app_country] => US [patent_app_date] => 1998-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 145 [patent_no_of_words] => 24175 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 345 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/289/06289434.pdf [firstpage_image] =>[orig_patent_app_number] => 032530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4422758 [patent_doc_number] => 06173391 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Bossless architecture and digital cell technology for computer programs' [patent_app_type] => 1 [patent_app_number] => 9/025529 [patent_app_country] => US [patent_app_date] => 1998-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9203 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/173/06173391.pdf [firstpage_image] =>[orig_patent_app_number] => 025529 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4147784 [patent_doc_number] => 06128722 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Data processing system having an apparatus for exception tracking during out-of-order operation and method therefor' [patent_app_type] => 1 [patent_app_number] => 9/023891 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4069 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128722.pdf [firstpage_image] =>[orig_patent_app_number] => 023891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1418959 [patent_doc_number] => 06546479 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-08 [patent_title] => 'Reduced instruction fetch latency in a system including a pipelined processor' [patent_app_type] => B1 [patent_app_number] => 09/021679 [patent_app_country] => US [patent_app_date] => 1998-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3917 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/546/06546479.pdf [firstpage_image] =>[orig_patent_app_number] => 09021679 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4318030 [patent_doc_number] => 06182203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Microprocessor' [patent_app_type] => 1 [patent_app_number] => 9/012813 [patent_app_country] => US [patent_app_date] => 1998-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 109 [patent_no_of_words] => 34136 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/182/06182203.pdf [firstpage_image] =>[orig_patent_app_number] => 012813 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4133297 [patent_doc_number] => 06047367 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Microprocessor with improved out of order support' [patent_app_type] => 1 [patent_app_number] => 9/009828 [patent_app_country] => US [patent_app_date] => 1998-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8692 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/047/06047367.pdf [firstpage_image] =>[orig_patent_app_number] => 009828 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4110154 [patent_doc_number] => 06134644 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Method and apparatus for reproducing operation guidance information, and method and apparatus for reproducing multi-media information' [patent_app_type] => 1 [patent_app_number] => 9/007074 [patent_app_country] => US [patent_app_date] => 1998-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 44 [patent_no_of_words] => 19109 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134644.pdf [firstpage_image] =>[orig_patent_app_number] => 007074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4236613 [patent_doc_number] => 06041402 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Direct vectored legacy instruction set emulation' [patent_app_type] => 1 [patent_app_number] => 9/002960 [patent_app_country] => US [patent_app_date] => 1998-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2256 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/041/06041402.pdf [firstpage_image] =>[orig_patent_app_number] => 002960 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4171928 [patent_doc_number] => 06125457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Networked computer security system' [patent_app_type] => 1 [patent_app_number] => 8/999439 [patent_app_country] => US [patent_app_date] => 1997-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4225 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/125/06125457.pdf [firstpage_image] =>[orig_patent_app_number] => 999439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4255513 [patent_doc_number] => 06119235 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Method and apparatus for quality of service management' [patent_app_type] => 1 [patent_app_number] => 8/998332 [patent_app_country] => US [patent_app_date] => 1997-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5368 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/119/06119235.pdf [firstpage_image] =>[orig_patent_app_number] => 998332 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4252603 [patent_doc_number] => 06076153 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Processor pipeline including partial replay' [patent_app_type] => 1 [patent_app_number] => 8/998341 [patent_app_country] => US [patent_app_date] => 1997-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4811 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/076/06076153.pdf [firstpage_image] =>[orig_patent_app_number] => 998341 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4304286 [patent_doc_number] => 06269399 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Gateway system and associated method' [patent_app_type] => 1 [patent_app_number] => 8/994374 [patent_app_country] => US [patent_app_date] => 1997-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8110 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/269/06269399.pdf [firstpage_image] =>[orig_patent_app_number] => 994374 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4239721 [patent_doc_number] => 06012099 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Method and integrated circuit for high-bandwidth network server interfacing to a local area network' [patent_app_type] => 1 [patent_app_number] => 8/994554 [patent_app_country] => US [patent_app_date] => 1997-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6755 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/012/06012099.pdf [firstpage_image] =>[orig_patent_app_number] => 994554 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3971304 [patent_doc_number] => 06000026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Multiple processor apparatus having a protocol processor intended for the execution of a collection of instructions in a reduced number of operations' [patent_app_type] => 1 [patent_app_number] => 8/990151 [patent_app_country] => US [patent_app_date] => 1997-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 3571 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/000/06000026.pdf [firstpage_image] =>[orig_patent_app_number] => 990151 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3857379 [patent_doc_number] => 05848248 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'Electronic document circulating system' [patent_app_type] => 1 [patent_app_number] => 8/978140 [patent_app_country] => US [patent_app_date] => 1997-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 11796 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/848/05848248.pdf [firstpage_image] =>[orig_patent_app_number] => 978140 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3945157 [patent_doc_number] => 05935236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Microcomputer capable of outputting pulses' [patent_app_type] => 1 [patent_app_number] => 8/974821 [patent_app_country] => US [patent_app_date] => 1997-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 69 [patent_no_of_words] => 13912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/935/05935236.pdf [firstpage_image] =>[orig_patent_app_number] => 974821 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3942911 [patent_doc_number] => 05878200 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Document processing apparatus for displaying inputted data in a print area based upon the size of a recording material and the reprinted data printed thereon' [patent_app_type] => 1 [patent_app_number] => 8/972966 [patent_app_country] => US [patent_app_date] => 1997-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 2849 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/878/05878200.pdf [firstpage_image] =>[orig_patent_app_number] => 972966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4223600 [patent_doc_number] => 06078975 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Data input/output apparatus, data input/output method, data recording and reproducing apparatus, and data recording and reproducing method' [patent_app_type] => 1 [patent_app_number] => 8/974561 [patent_app_country] => US [patent_app_date] => 1997-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5943 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/078/06078975.pdf [firstpage_image] =>[orig_patent_app_number] => 974561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4085369 [patent_doc_number] => 06009507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'System and method for distributing processing among one or more processors' [patent_app_type] => 1 [patent_app_number] => 8/974651 [patent_app_country] => US [patent_app_date] => 1997-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6788 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009507.pdf [firstpage_image] =>[orig_patent_app_number] => 974651 [rel_patent_id] =>[rel_patent_doc_number] =>)