Search

Eliseo Ramos Feliciano

Supervisory Patent Examiner (ID: 8243, Phone: (571)272-7925 , Office: P/2863 )

Most Active Art Unit
2617
Art Unit(s)
2857, 2617, 2681, 2895, 2745, 2817, 2687, 2682
Total Applications
285
Issued Applications
150
Pending Applications
66
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3951164 [patent_doc_number] => 05872905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Recording area management method, error recovery processing method, and storage apparatus' [patent_app_type] => 1 [patent_app_number] => 8/811484 [patent_app_country] => US [patent_app_date] => 1997-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 15526 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872905.pdf [firstpage_image] =>[orig_patent_app_number] => 811484 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/811484
Recording area management method, error recovery processing method, and storage apparatus Mar 4, 1997 Issued
08/808138 PROGRAMMABLE TIMING METHOD AND APPARATUS FOR PROGRAMMABLY GENERATING GENERIC AND THEN TYPE SPECIFIC MEMORY TIMING SIGNALS Feb 27, 1997 Abandoned
08/808054 MEMORY CONTROL DEVICE AND ADDRESS GENERATING CIRCUIT Feb 27, 1997 Abandoned
Array ( [id] => 4008697 [patent_doc_number] => 05892965 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Pipeline processing method and device for instruction execution' [patent_app_type] => 1 [patent_app_number] => 8/806221 [patent_app_country] => US [patent_app_date] => 1997-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5652 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892965.pdf [firstpage_image] =>[orig_patent_app_number] => 806221 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/806221
Pipeline processing method and device for instruction execution Feb 24, 1997 Issued
Array ( [id] => 3951135 [patent_doc_number] => 05872903 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Integrated circuit device with a memory that preserves its content independently of a synchronizing signal when given a self-control request' [patent_app_type] => 1 [patent_app_number] => 8/805350 [patent_app_country] => US [patent_app_date] => 1997-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4942 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872903.pdf [firstpage_image] =>[orig_patent_app_number] => 805350 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/805350
Integrated circuit device with a memory that preserves its content independently of a synchronizing signal when given a self-control request Feb 23, 1997 Issued
Array ( [id] => 3987693 [patent_doc_number] => 05922066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Multifunction data aligner in wide data width processor' [patent_app_type] => 1 [patent_app_number] => 8/805392 [patent_app_country] => US [patent_app_date] => 1997-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4381 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/922/05922066.pdf [firstpage_image] =>[orig_patent_app_number] => 805392 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/805392
Multifunction data aligner in wide data width processor Feb 23, 1997 Issued
Array ( [id] => 3953122 [patent_doc_number] => 05982393 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Arrangement at an image processor' [patent_app_type] => 1 [patent_app_number] => 8/776070 [patent_app_country] => US [patent_app_date] => 1997-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1585 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/982/05982393.pdf [firstpage_image] =>[orig_patent_app_number] => 776070 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/776070
Arrangement at an image processor Feb 13, 1997 Issued
Array ( [id] => 4100078 [patent_doc_number] => 06055619 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Circuits, system, and methods for processing multiple data streams' [patent_app_type] => 1 [patent_app_number] => 8/797232 [patent_app_country] => US [patent_app_date] => 1997-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 144 [patent_no_of_words] => 81037 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055619.pdf [firstpage_image] =>[orig_patent_app_number] => 797232 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/797232
Circuits, system, and methods for processing multiple data streams Feb 6, 1997 Issued
08/798304 SET-TOP COMPUTER Feb 6, 1997 Abandoned
Array ( [id] => 4061088 [patent_doc_number] => 05895498 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Arithmetic processor which latches data in a temporary register before the data is latched in a general purpose register' [patent_app_type] => 1 [patent_app_number] => 8/792733 [patent_app_country] => US [patent_app_date] => 1997-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6846 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/895/05895498.pdf [firstpage_image] =>[orig_patent_app_number] => 792733 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/792733
Arithmetic processor which latches data in a temporary register before the data is latched in a general purpose register Jan 30, 1997 Issued
Array ( [id] => 4121513 [patent_doc_number] => 06023757 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Data processor' [patent_app_type] => 1 [patent_app_number] => 8/791811 [patent_app_country] => US [patent_app_date] => 1997-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8020 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023757.pdf [firstpage_image] =>[orig_patent_app_number] => 791811 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/791811
Data processor Jan 29, 1997 Issued
Array ( [id] => 3878265 [patent_doc_number] => 05796994 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Patch mechanism for allowing dynamic modifications of the behavior of a state machine' [patent_app_type] => 1 [patent_app_number] => 8/792713 [patent_app_country] => US [patent_app_date] => 1997-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4102 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796994.pdf [firstpage_image] =>[orig_patent_app_number] => 792713 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/792713
Patch mechanism for allowing dynamic modifications of the behavior of a state machine Jan 29, 1997 Issued
Array ( [id] => 3877929 [patent_doc_number] => 05793961 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Computer system with data conference capability' [patent_app_type] => 1 [patent_app_number] => 8/790152 [patent_app_country] => US [patent_app_date] => 1997-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4516 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793961.pdf [firstpage_image] =>[orig_patent_app_number] => 790152 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/790152
Computer system with data conference capability Jan 27, 1997 Issued
Array ( [id] => 3997178 [patent_doc_number] => 05961628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Load and store unit for a vector processor' [patent_app_type] => 1 [patent_app_number] => 8/789575 [patent_app_country] => US [patent_app_date] => 1997-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8800 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/961/05961628.pdf [firstpage_image] =>[orig_patent_app_number] => 789575 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/789575
Load and store unit for a vector processor Jan 27, 1997 Issued
Array ( [id] => 3992968 [patent_doc_number] => 05918042 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Dynamic logic pipeline control' [patent_app_type] => 1 [patent_app_number] => 8/783310 [patent_app_country] => US [patent_app_date] => 1997-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4124 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918042.pdf [firstpage_image] =>[orig_patent_app_number] => 783310 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/783310
Dynamic logic pipeline control Jan 9, 1997 Issued
Array ( [id] => 4076236 [patent_doc_number] => 05896520 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Virtual computer system of multi-processor constitution' [patent_app_type] => 1 [patent_app_number] => 8/781211 [patent_app_country] => US [patent_app_date] => 1997-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3918 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/896/05896520.pdf [firstpage_image] =>[orig_patent_app_number] => 781211 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/781211
Virtual computer system of multi-processor constitution Jan 9, 1997 Issued
Array ( [id] => 3795887 [patent_doc_number] => 05758085 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Semiconductor memory based server for providing multimedia information on demand over wide area networks' [patent_app_type] => 1 [patent_app_number] => 8/778230 [patent_app_country] => US [patent_app_date] => 1997-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 9912 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/758/05758085.pdf [firstpage_image] =>[orig_patent_app_number] => 778230 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/778230
Semiconductor memory based server for providing multimedia information on demand over wide area networks Jan 7, 1997 Issued
Array ( [id] => 4029648 [patent_doc_number] => 05963721 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Microprocessor system with capability for asynchronous bus transactions' [patent_app_type] => 1 [patent_app_number] => 8/777322 [patent_app_country] => US [patent_app_date] => 1996-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10078 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963721.pdf [firstpage_image] =>[orig_patent_app_number] => 777322 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/777322
Microprocessor system with capability for asynchronous bus transactions Dec 26, 1996 Issued
Array ( [id] => 3765828 [patent_doc_number] => 05802595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Serial data transfer apparatus' [patent_app_type] => 1 [patent_app_number] => 8/777290 [patent_app_country] => US [patent_app_date] => 1996-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3927 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802595.pdf [firstpage_image] =>[orig_patent_app_number] => 777290 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/777290
Serial data transfer apparatus Dec 26, 1996 Issued
Array ( [id] => 3807065 [patent_doc_number] => 05781431 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Process and apparatus for high speed on the fly supply of information necessary for routing data structures' [patent_app_type] => 1 [patent_app_number] => 8/774077 [patent_app_country] => US [patent_app_date] => 1996-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 32 [patent_no_of_words] => 10537 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/781/05781431.pdf [firstpage_image] =>[orig_patent_app_number] => 774077 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/774077
Process and apparatus for high speed on the fly supply of information necessary for routing data structures Dec 22, 1996 Issued
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